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Diffstat (limited to 'src/cpu/intel/microcode/microcode.c')
-rw-r--r--src/cpu/intel/microcode/microcode.c96
1 files changed, 4 insertions, 92 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 83a412673f..c823eb81dd 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -29,16 +29,12 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
-#ifdef __PRE_RAM__
-#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
-#include <arch/cbfs.h>
-#endif
-#else
-#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
+#if !defined(__PRE_RAM__)
#include <cbfs.h>
-#endif
#include <smp/spinlock.h>
DECLARE_SPIN_LOCK(microcode_lock)
+#else
+#include <arch/cbfs.h>
#endif
struct microcode {
@@ -82,8 +78,6 @@ static inline u32 read_microcode_rev(void)
return msr.hi;
}
-#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
-
#define MICROCODE_CBFS_FILE "cpu_microcode_blob.bin"
void intel_microcode_load_unlocked(const void *microcode_patch)
@@ -168,7 +162,7 @@ const void *intel_microcode_find(void)
update_size = m->total_size;
} else {
#if !defined(__ROMCC__)
- printk(BIOS_WARNING, "Microcode has no valid size field!\n");
+ printk(BIOS_SPEW, "Microcode size field is 0\n");
#endif
update_size = 2048;
}
@@ -206,85 +200,3 @@ void intel_update_microcode_from_cbfs(void)
spin_unlock(&microcode_lock);
#endif
}
-
-#else /* !CONFIG_SUPPORT_CPU_UCODE_IN_CBFS */
-
-void intel_update_microcode(const void *microcode_updates)
-{
- u32 eax;
- u32 pf, rev, sig;
- unsigned int x86_model, x86_family;
- const struct microcode *m;
- const char *c;
- msr_t msr;
-
- if (!microcode_updates) {
-#if !defined(__ROMCC__)
- printk(BIOS_WARNING, "No microcode updates found.\n");
-#endif
- return;
- }
-
- /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
- msr.lo = 0;
- msr.hi = 0;
- wrmsr(0x8B, msr);
- eax = cpuid_eax(1);
- msr = rdmsr(0x8B);
- rev = msr.hi;
- x86_model = (eax >>4) & 0x0f;
- x86_family = (eax >>8) & 0x0f;
- sig = eax;
-
- pf = 0;
- if ((x86_model >= 5)||(x86_family>6)) {
- msr = rdmsr(0x17);
- pf = 1 << ((msr.hi >> 18) & 7);
- }
-#if !defined(__ROMCC__)
- /* If this code is compiled with ROMCC we're probably in
- * the bootblock and don't have console output yet.
- */
- printk(BIOS_DEBUG, "microcode: sig=0x%x pf=0x%x revision=0x%x\n",
- sig, pf, rev);
-#endif
-#if !defined(__ROMCC__) && !defined(__PRE_RAM__)
- spin_lock(&microcode_lock);
-#endif
-
- m = microcode_updates;
- for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) {
- if ((m->sig == sig) && (m->pf & pf)) {
- unsigned int new_rev;
- msr.lo = (unsigned long)c + sizeof(struct microcode);
- msr.hi = 0;
- wrmsr(0x79, msr);
-
- /* Read back the new microcode version */
- new_rev = read_microcode_rev();
-
-#if !defined(__ROMCC__)
- printk(BIOS_DEBUG, "microcode: updated to revision "
- "0x%x date=%04x-%02x-%02x\n", new_rev,
- m->date & 0xffff, (m->date >> 24) & 0xff,
- (m->date >> 16) & 0xff);
-#endif
- break;
- }
-
- if (m->total_size) {
- c += m->total_size;
- } else {
-#if !defined(__ROMCC__)
- printk(BIOS_WARNING, "Microcode has no valid size field!\n");
-#endif
- c += 2048;
- }
- }
-
-#if !defined(__ROMCC__) && !defined(__PRE_RAM__)
- spin_unlock(&microcode_lock);
-#endif
-}
-
-#endif