summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_1067x/model_1067x_init.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/model_1067x/model_1067x_init.c')
-rw-r--r--src/cpu/intel/model_1067x/model_1067x_init.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index dbb9631ad8..8f8af57037 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -21,12 +21,14 @@
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
+#include <cpu/x86/mp.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/speedstep.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/smm/gen1/smi.h>
#include <cpu/intel/common/common.h>
#include "chip.h"
@@ -279,15 +281,18 @@ static void model_1067x_init(struct device *cpu)
x86_enable_cache();
/* Update the microcode */
- intel_update_microcode_from_cbfs();
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ intel_update_microcode_from_cbfs();
/* Print processor name */
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Setup MTRRs */
- x86_setup_mtrrs();
- x86_mtrr_check();
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP)) {
+ x86_setup_mtrrs();
+ x86_mtrr_check();
+ }
/* Enable the local CPU APICs */
setup_lapic();
@@ -315,7 +320,8 @@ static void model_1067x_init(struct device *cpu)
configure_pic_thermal_sensors(tm2, quad);
/* Start up my CPU siblings */
- intel_sibling_init(cpu);
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ intel_sibling_init(cpu);
}
static struct device_operations cpu_dev_ops = {