summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_106cx/cache_as_ram.inc
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/model_106cx/cache_as_ram.inc')
-rw-r--r--src/cpu/intel/model_106cx/cache_as_ram.inc5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index 03e0c2671c..9b7cad0cf9 100644
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -97,6 +97,11 @@ clear_mtrrs:
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
+ /*
+ * IMPORTANT: The two lines below can _not_ be written like this:
+ * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+ * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ */
movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr