summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_67x/model_67x_init.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/model_67x/model_67x_init.c')
-rw-r--r--src/cpu/intel/model_67x/model_67x_init.c16
1 files changed, 1 insertions, 15 deletions
diff --git a/src/cpu/intel/model_67x/model_67x_init.c b/src/cpu/intel/model_67x/model_67x_init.c
index 3ebe3618b1..467d3db976 100644
--- a/src/cpu/intel/model_67x/model_67x_init.c
+++ b/src/cpu/intel/model_67x/model_67x_init.c
@@ -29,24 +29,10 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/l2_cache.h>
-static const uint32_t microcode_updates[] = {
- /* Include microcode updates here. */
- #include "microcode-293-MU267114.h"
- #include "microcode-530-MU16730e.h"
- #include "microcode-531-MU26732e.h"
- #include "microcode-539-MU167210.h"
- #include "microcode-540-MU267238.h"
- /* Dummy terminator */
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
-};
-
static void model_67x_init(device_t cpu)
{
/* Update the microcode */
- intel_update_microcode(microcode_updates);
+ intel_update_microcode_from_cbfs();
/* Initialize L2 cache */
p6_configure_l2_cache();