4 files changed, 13 insertions, 11 deletions
diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig
index 5e70f59117..546d9ece2e 100644
--- a/src/cpu/intel/model_6dx/Kconfig
+++ b/src/cpu/intel/model_6dx/Kconfig
@@ -1,3 +1,4 @@
 config CPU_INTEL_MODEL_6DX
 	bool
 	select SMP
+	select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6dx/Makefile.inc b/src/cpu/intel/model_6dx/Makefile.inc
index cc88a2c513..4731de3858 100644
--- a/src/cpu/intel/model_6dx/Makefile.inc
+++ b/src/cpu/intel/model_6dx/Makefile.inc
@@ -1 +1,3 @@
 ramstage-y += model_6dx_init.c
+
+cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/intel/model_6dx/microcode_blob.c b/src/cpu/intel/model_6dx/microcode_blob.c
new file mode 100644
index 0000000000..52489e4c7c
--- /dev/null
+++ b/src/cpu/intel/model_6dx/microcode_blob.c
@@ -0,0 +1,9 @@
+unsigned microcode_updates_6dx[] = {
+	#include "microcode-1355-m206d618.h"
+
+	/*  Dummy terminator  */
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+};
diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c
index 19b351dd1c..06236a3b3b 100644
--- a/src/cpu/intel/model_6dx/model_6dx_init.c
+++ b/src/cpu/intel/model_6dx/model_6dx_init.c
@@ -9,16 +9,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static uint32_t microcode_updates[] = {
-	#include "microcode-1355-m206d618.h"
-
-	/*  Dummy terminator  */
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-};
-
 static void model_6dx_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
@@ -27,7 +17,7 @@ static void model_6dx_init(device_t dev)
 	x86_mtrr_check();
 
 	/* Update the microcode */
-	intel_update_microcode(microcode_updates);
+	intel_update_microcode_from_cbfs();
 
 	/* Enable the local cpu apics */
 	setup_lapic();