diff options
Diffstat (limited to 'src/cpu/intel/model_6fx')
-rw-r--r-- | src/cpu/intel/model_6fx/Kconfig | 1 | ||||
-rw-r--r-- | src/cpu/intel/model_6fx/Makefile.inc | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_6fx/microcode_blob.c | 26 | ||||
-rw-r--r-- | src/cpu/intel/model_6fx/model_6fx_init.c | 29 |
4 files changed, 30 insertions, 28 deletions
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index 4517f17fa6..3335a26211 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -5,3 +5,4 @@ config CPU_INTEL_MODEL_6FX select UDELAY_LAPIC select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE + select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index b75cde3dce..6a1bb51cf5 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -1,2 +1,4 @@ ramstage-y += model_6fx_init.c subdirs-y += ../../x86/name + +cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c diff --git a/src/cpu/intel/model_6fx/microcode_blob.c b/src/cpu/intel/model_6fx/microcode_blob.c new file mode 100644 index 0000000000..f17613b47a --- /dev/null +++ b/src/cpu/intel/model_6fx/microcode_blob.c @@ -0,0 +1,26 @@ +unsigned microcode_updates_6fx[] = { + #include "microcode-m016fbBA.h" + #include "microcode-m046fbBC.h" + #include "microcode-m086fbBB.h" + #include "microcode-m106f76a.h" + #include "microcode-m106fbBA.h" + #include "microcode-m16f25d.h" + #include "microcode-m16f6d0.h" + #include "microcode-m16fda4.h" + #include "microcode-m206f25c.h" + #include "microcode-m206f6d1.h" + #include "microcode-m206fbBA.h" + #include "microcode-m206fda4.h" + #include "microcode-m406f76b.h" + #include "microcode-m406fbBC.h" + #include "microcode-m46f6d2.h" + #include "microcode-m806fa95.h" + #include "microcode-m806fbBA.h" + #include "microcode-m806fda4.h" + + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index faf1277bd2..39aa8e9720 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -33,33 +33,6 @@ #include <cpu/x86/cache.h> #include <cpu/x86/name.h> -static const uint32_t microcode_updates[] = { - #include "microcode-m016fbBA.h" - #include "microcode-m046fbBC.h" - #include "microcode-m086fbBB.h" - #include "microcode-m106f76a.h" - #include "microcode-m106fbBA.h" - #include "microcode-m16f25d.h" - #include "microcode-m16f6d0.h" - #include "microcode-m16fda4.h" - #include "microcode-m206f25c.h" - #include "microcode-m206f6d1.h" - #include "microcode-m206fbBA.h" - #include "microcode-m206fda4.h" - #include "microcode-m406f76b.h" - #include "microcode-m406fbBC.h" - #include "microcode-m46f6d2.h" - #include "microcode-m806fa95.h" - #include "microcode-m806fbBA.h" - #include "microcode-m806fda4.h" - - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - #define IA32_FEATURE_CONTROL 0x003a #define CPUID_VMX (1 << 5) @@ -197,7 +170,7 @@ static void model_6fx_init(device_t cpu) x86_enable_cache(); /* Update the microcode */ - intel_update_microcode(microcode_updates); + intel_update_microcode_from_cbfs(); /* Print processor name */ fill_processor_name(processor_name); |