summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_f3x
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/model_f3x')
-rw-r--r--src/cpu/intel/model_f3x/Makefile.inc1
-rw-r--r--src/cpu/intel/model_f3x/model_f3x_init.c5
2 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/intel/model_f3x/Makefile.inc b/src/cpu/intel/model_f3x/Makefile.inc
index 7367914d6f..19b2e9302b 100644
--- a/src/cpu/intel/model_f3x/Makefile.inc
+++ b/src/cpu/intel/model_f3x/Makefile.inc
@@ -1,4 +1,5 @@
ramstage-y += model_f3x_init.c
subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f3x/microcode.bin
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c
index b71e2797d3..fc0db17a54 100644
--- a/src/cpu/intel/model_f3x/model_f3x_init.c
+++ b/src/cpu/intel/model_f3x/model_f3x_init.c
@@ -24,7 +24,7 @@ static void model_f3x_init(struct device *cpu)
/* Turn on caching if we haven't already */
x86_enable_cache();
- if (!intel_ht_sibling()) {
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP) && !intel_ht_sibling()) {
/* MTRRs are shared between threads */
x86_setup_mtrrs();
x86_mtrr_check();
@@ -37,7 +37,8 @@ static void model_f3x_init(struct device *cpu)
setup_lapic();
/* Start up my CPU siblings */
- intel_sibling_init(cpu);
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ intel_sibling_init(cpu);
};
static struct device_operations cpu_dev_ops = {