summaryrefslogtreecommitdiff
path: root/src/cpu/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 4b563014e9..381d7bfcb5 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -25,7 +25,7 @@ void romstage_common(const struct romstage_params *params)
/* Perform some early chipset initialization required
* before RAM initialization can work
*/
- haswell_early_initialization(HASWELL_MOBILE);
+ haswell_early_initialization();
printk(BIOS_DEBUG, "Back from haswell_early_initialization()\n");
if (wake_from_s3) {