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-rw-r--r--src/cpu/intel/fsp_model_206ax/finalize.c2
-rw-r--r--src/cpu/intel/haswell/finalize.c2
-rw-r--r--src/cpu/intel/model_2065x/finalize.c2
-rw-r--r--src/cpu/intel/model_206ax/finalize.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/finalize.c b/src/cpu/intel/fsp_model_206ax/finalize.c
index 53a6cc9c15..2d5973b984 100644
--- a/src/cpu/intel/fsp_model_206ax/finalize.c
+++ b/src/cpu/intel/fsp_model_206ax/finalize.c
@@ -69,7 +69,7 @@ void intel_model_206ax_finalize_smm(void)
msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
#endif
- /* Lock TM interupts - route thermal events to all processors */
+ /* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);
/* Lock memory configuration to protect SMM */
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index ba2538702e..ce22e629e8 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -72,7 +72,7 @@ void intel_cpu_haswell_finalize_smm(void)
msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
#endif
- /* Lock TM interupts - route thermal events to all processors */
+ /* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);
/* Lock memory configuration to protect SMM */
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c
index 5e7b3d847c..8425f6afe6 100644
--- a/src/cpu/intel/model_2065x/finalize.c
+++ b/src/cpu/intel/model_2065x/finalize.c
@@ -52,6 +52,6 @@ void intel_model_2065x_finalize_smm(void)
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
- /* Lock TM interupts - route thermal events to all processors */
+ /* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);
}
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 50f49772d4..7d3cc2ee0e 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -70,7 +70,7 @@ void intel_model_206ax_finalize_smm(void)
msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
#endif
- /* Lock TM interupts - route thermal events to all processors */
+ /* Lock TM interrupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);
/* Lock memory configuration to protect SMM */