diff options
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/microcode/microcode.c | 4 | ||||
| -rw-r--r-- | src/cpu/intel/model_106cx/cache_as_ram_disable.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index a02323dedf..22c3a11503 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -82,7 +82,7 @@ void intel_update_microcode(const void *microcode_updates) print_debug_hex32(pf); print_debug(" rev = 0x"); print_debug_hex32(rev); - print_debug("\r\n"); + print_debug("\n"); m = microcode_updates; for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) { @@ -99,7 +99,7 @@ void intel_update_microcode(const void *microcode_updates) print_debug_hex32(new_rev); print_debug(" from revision "); print_debug_hex32(rev); - print_debug("\r\n"); + print_debug("\n"); break; } if (m->total_size) { diff --git a/src/cpu/intel/model_106cx/cache_as_ram_disable.c b/src/cpu/intel/model_106cx/cache_as_ram_disable.c index fa7ab74bbc..40269ba5b3 100644 --- a/src/cpu/intel/model_106cx/cache_as_ram_disable.c +++ b/src/cpu/intel/model_106cx/cache_as_ram_disable.c @@ -40,10 +40,10 @@ void stage1_main(unsigned long bist) "movl %%esp, %0\n\t" : "=a" (v_esp) ); - printk(BIOS_SPEW, "v_esp=%08x\r\n", v_esp); + printk(BIOS_SPEW, "v_esp=%08x\n", v_esp); } - printk(BIOS_SPEW, "cpu_reset = %08x\r\n",cpu_reset); + printk(BIOS_SPEW, "cpu_reset = %08x\n",cpu_reset); if(cpu_reset == 0) { print_spew("Clearing initial memory region: "); @@ -83,12 +83,12 @@ void stage1_main(unsigned long bist) #ifdef CONFIG_DEACTIVATE_CAR print_debug("Deactivating CAR"); #include CONFIG_DEACTIVATE_CAR_FILE - print_debug(" - Done.\r\n"); + print_debug(" - Done.\n"); #endif /* Copy and execute coreboot_ram */ copy_and_run(new_cpu_reset); /* We will not return */ } - print_debug("sorry. parachute did not open.\r\n"); + print_debug("sorry. parachute did not open.\n"); } |