diff options
Diffstat (limited to 'src/cpu/intel')
24 files changed, 25 insertions, 25 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index 0ec2a9d43d..3e2b3e24ac 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -87,7 +87,7 @@ addrsize_no_MSR: movl $0x0f, %edx /* Preload high word of address mask (in %edx) for Variable - * MTRRs 0 and 1 and enable local apic at default base. + * MTRRs 0 and 1 and enable local APIC at default base. */ addrsize_set_high: xorl %eax, %eax diff --git a/src/cpu/intel/ep80579/ep80579_init.c b/src/cpu/intel/ep80579/ep80579_init.c index 3093975bea..78860b4cdf 100644 --- a/src/cpu/intel/ep80579/ep80579_init.c +++ b/src/cpu/intel/ep80579/ep80579_init.c @@ -34,7 +34,7 @@ static void ep80579_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index 1d4ae5899e..6789baedcf 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -386,7 +386,7 @@ static void model_206ax_init(struct device *cpu) /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ enable_lapic_tpr(); setup_lapic(); diff --git a/src/cpu/intel/fsp_model_406dx/model_406dx_init.c b/src/cpu/intel/fsp_model_406dx/model_406dx_init.c index badadf1d52..ef48c032f4 100644 --- a/src/cpu/intel/fsp_model_406dx/model_406dx_init.c +++ b/src/cpu/intel/fsp_model_406dx/model_406dx_init.c @@ -182,7 +182,7 @@ static void model_406dx_init(struct device *cpu) x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Enable virtualization */ diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 799b66cf90..2fac8791d3 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -720,7 +720,7 @@ static void haswell_init(struct device *cpu) /* Clear out pending MCEs */ configure_mca(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ enable_lapic_tpr(); setup_lapic(); diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 1812084812..e28a331225 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -32,7 +32,7 @@ static void init_timer(void) { - /* Set the apic timer to no interrupts and periodic mode */ + /* Set the APIC timer to no interrupts and periodic mode */ lapic_write(LAPIC_LVTT, (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0)); /* Set the divider to 1, no divider */ @@ -322,7 +322,7 @@ static void model_1067x_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Initialize the APIC timer */ diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index ac4606baf9..7f4a9abda5 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -124,7 +124,7 @@ static void model_106cx_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Enable virtualization */ diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 6bd20ba832..7987f8e36a 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -379,7 +379,7 @@ static void model_2065x_init(struct device *cpu) /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ enable_lapic_tpr(); setup_lapic(); diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index a2cbfbf7b1..e7bfd9e298 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -572,7 +572,7 @@ static void model_206ax_init(struct device *cpu) /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ enable_lapic_tpr(); setup_lapic(); diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x/model_65x_init.c index 14da6326f5..a4e222ddf4 100644 --- a/src/cpu/intel/model_65x/model_65x_init.c +++ b/src/cpu/intel/model_65x/model_65x_init.c @@ -36,7 +36,7 @@ static void model_65x_init(struct device *dev) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_67x/model_67x_init.c b/src/cpu/intel/model_67x/model_67x_init.c index d7c22fc121..f4b8155f0d 100644 --- a/src/cpu/intel/model_67x/model_67x_init.c +++ b/src/cpu/intel/model_67x/model_67x_init.c @@ -40,7 +40,7 @@ static void model_67x_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); } diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c index e27679149d..ad1f3a0791 100644 --- a/src/cpu/intel/model_68x/model_68x_init.c +++ b/src/cpu/intel/model_68x/model_68x_init.c @@ -44,7 +44,7 @@ static void model_68x_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); } diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c index d283722de7..2f12224409 100644 --- a/src/cpu/intel/model_69x/model_69x_init.c +++ b/src/cpu/intel/model_69x/model_69x_init.c @@ -18,7 +18,7 @@ static void model_69x_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c index 36da288d78..e52bd31c2d 100644 --- a/src/cpu/intel/model_6bx/model_6bx_init.c +++ b/src/cpu/intel/model_6bx/model_6bx_init.c @@ -44,7 +44,7 @@ static void model_6bx_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); } diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c index 73f71d8f28..a18b00c90b 100644 --- a/src/cpu/intel/model_6dx/model_6dx_init.c +++ b/src/cpu/intel/model_6dx/model_6dx_init.c @@ -31,7 +31,7 @@ static void model_6dx_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index bc926a822b..91633ecd9d 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -154,7 +154,7 @@ static void model_6ex_init(struct device *cpu) x86_setup_mtrrs(); x86_mtrr_check(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Enable virtualization */ diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 30542e608a..18160adfad 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -177,7 +177,7 @@ static void model_6fx_init(struct device *cpu) /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Enable virtualization */ diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c index 102af74fb5..68c0136172 100644 --- a/src/cpu/intel/model_6xx/model_6xx_init.c +++ b/src/cpu/intel/model_6xx/model_6xx_init.c @@ -31,7 +31,7 @@ static void model_6xx_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c index 1eb234f60d..f833a568a6 100644 --- a/src/cpu/intel/model_f0x/model_f0x_init.c +++ b/src/cpu/intel/model_f0x/model_f0x_init.c @@ -31,7 +31,7 @@ static void model_f0x_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c index 77f442f18d..4af3934f3d 100644 --- a/src/cpu/intel/model_f1x/model_f1x_init.c +++ b/src/cpu/intel/model_f1x/model_f1x_init.c @@ -31,7 +31,7 @@ static void model_f1x_init(struct device *dev) /* Update the microcode */ intel_update_microcode_from_cbfs(); - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); }; diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c index 092afa03f3..97c7d9ddd1 100644 --- a/src/cpu/intel/model_f2x/model_f2x_init.c +++ b/src/cpu/intel/model_f2x/model_f2x_init.c @@ -36,7 +36,7 @@ static void model_f2x_init(struct device *cpu) intel_update_microcode_from_cbfs(); } - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Start up my CPU siblings */ diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 36ca5a69b4..8fbcaa73dc 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -36,7 +36,7 @@ static void model_f3x_init(struct device *cpu) intel_update_microcode_from_cbfs(); } - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Start up my CPU siblings */ diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index 7d198b35a4..c904b62479 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -36,7 +36,7 @@ static void model_f4x_init(struct device *cpu) intel_update_microcode_from_cbfs(); } - /* Enable the local CPU apics */ + /* Enable the local CPU APICs */ setup_lapic(); /* Start up my CPU siblings */ diff --git a/src/cpu/intel/speedstep/speedstep.c b/src/cpu/intel/speedstep/speedstep.c index 3ab3231080..96ac8e59e0 100644 --- a/src/cpu/intel/speedstep/speedstep.c +++ b/src/cpu/intel/speedstep/speedstep.c @@ -110,7 +110,7 @@ static void speedstep_get_limits(sst_params_t *const params) * @brief Generate full p-states table from processor parameters * * This is generic code and should work at least for Merom and Penryn - * processors. It is used to generate acpi tables and configure EMTTM. + * processors. It is used to generate ACPI tables and configure EMTTM. */ void speedstep_gen_pstates(sst_table_t *const table) { |