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-rw-r--r--src/cpu/ppc/ppc7xx/Config.lb27
1 files changed, 0 insertions, 27 deletions
diff --git a/src/cpu/ppc/ppc7xx/Config.lb b/src/cpu/ppc/ppc7xx/Config.lb
deleted file mode 100644
index a04a777a06..0000000000
--- a/src/cpu/ppc/ppc7xx/Config.lb
+++ /dev/null
@@ -1,27 +0,0 @@
-##
-## CPU initialization
-##
-uses CONFIG_RAMBASE
-uses CONFIG_USE_DCACHE_RAM
-uses CONFIG_DCACHE_RAM_BASE
-uses CONFIG_DCACHE_RAM_SIZE
-
-##
-## PPC7XX always uses cache ram for initial setup
-##
-default CONFIG_USE_DCACHE_RAM=1
-## Set dcache ram above coreboot image
-default CONFIG_DCACHE_RAM_BASE=CONFIG_RAMBASE+0x100000
-## Dcache size is 16Kb
-default CONFIG_DCACHE_RAM_SIZE=16384
-
-initinclude "FAMILY_INIT" cpu/ppc/ppc7xx/ppc7xx.inc
-
-# Only TotalImpact Briq uses the ppc7xx and it brings its own clock.o
-# so we comment this out for now:
-# object clock.o
-object cache.S
-#initobject clock.o
-initobject cache.S
-
-dir /cpu/simple_init