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Diffstat (limited to 'src/cpu/samsung/exynos5-common/clock.h')
-rw-r--r--src/cpu/samsung/exynos5-common/clock.h94
1 files changed, 94 insertions, 0 deletions
diff --git a/src/cpu/samsung/exynos5-common/clock.h b/src/cpu/samsung/exynos5-common/clock.h
new file mode 100644
index 0000000000..c0cd896b22
--- /dev/null
+++ b/src/cpu/samsung/exynos5-common/clock.h
@@ -0,0 +1,94 @@
+/*
+ * (C) Copyright 2009 Samsung Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
+ * Heungjun Kim <riverful.kim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_CLOCK_H_
+#define __ASM_ARM_ARCH_CLOCK_H_
+
+#ifndef __ASSEMBLER__
+struct s5pc100_clock {
+ unsigned int apll_lock;
+ unsigned int mpll_lock;
+ unsigned int epll_lock;
+ unsigned int hpll_lock;
+ unsigned char res1[0xf0];
+ unsigned int apll_con;
+ unsigned int mpll_con;
+ unsigned int epll_con;
+ unsigned int hpll_con;
+ unsigned char res2[0xf0];
+ unsigned int src0;
+ unsigned int src1;
+ unsigned int src2;
+ unsigned int src3;
+ unsigned char res3[0xf0];
+ unsigned int div0;
+ unsigned int div1;
+ unsigned int div2;
+ unsigned int div3;
+ unsigned int div4;
+ unsigned char res4[0x1ec];
+ unsigned int gate_d00;
+ unsigned int gate_d01;
+ unsigned int gate_d02;
+ unsigned char res5[0x54];
+ unsigned int gate_sclk0;
+ unsigned int gate_sclk1;
+};
+
+struct s5pc110_clock {
+ unsigned int apll_lock;
+ unsigned char res1[0x4];
+ unsigned int mpll_lock;
+ unsigned char res2[0x4];
+ unsigned int epll_lock;
+ unsigned char res3[0xc];
+ unsigned int vpll_lock;
+ unsigned char res4[0xdc];
+ unsigned int apll_con;
+ unsigned char res5[0x4];
+ unsigned int mpll_con;
+ unsigned char res6[0x4];
+ unsigned int epll_con;
+ unsigned char res7[0xc];
+ unsigned int vpll_con;
+ unsigned char res8[0xdc];
+ unsigned int src0;
+ unsigned int src1;
+ unsigned int src2;
+ unsigned int src3;
+ unsigned char res9[0xf0];
+ unsigned int div0;
+ unsigned int div1;
+ unsigned int div2;
+ unsigned int div3;
+ unsigned int div4;
+ unsigned char res10[0x1ec];
+ unsigned int gate_d00;
+ unsigned int gate_d01;
+ unsigned int gate_d02;
+ unsigned char res11[0x54];
+ unsigned int gate_sclk0;
+ unsigned int gate_sclk1;
+};
+#endif
+
+#endif