1 files changed, 53 insertions, 64 deletions
diff --git a/src/cpu/samsung/exynos5250/gpio.h b/src/cpu/samsung/exynos5250/gpio.h
index 0b97526f08..a8f22f7df0 100644
--- a/src/cpu/samsung/exynos5250/gpio.h
+++ b/src/cpu/samsung/exynos5250/gpio.h
@@ -20,6 +20,8 @@
 #ifndef CPU_SAMSUNG_EXYNOS5250_GPIO_H
 #define CPU_SAMSUNG_EXYNOS5250_GPIO_H
 
+#include "cpu.h"
+
 struct gpio_bank {
 	unsigned int	con;
 	unsigned int	dat;
@@ -52,71 +54,58 @@ struct gpio_bank {
 #define GPIO_DRV_FAST	0x0
 #define GPIO_DRV_SLOW	0x1
 
-#define EXYNOS5_GPIO_BASE0	0x11400000
-#define EXYNOS5_GPIO_BASE1	0x13400000
-#define EXYNOS5_GPIO_BASE2	0x10d10000
-#define EXYNOS5_GPIO_BASE3	0x03860000
-
 enum exynos5_gpio_port {
-	/*
-	 * Ordered by base address + offset.
-	 * ETC registers are special, thus not included.
-	 */
-
-	/* base == EXYNOS_GPIO_BASE0 */
-	EXYNOS5_GPA0 = EXYNOS5_GPIO_BASE0 + 0x0000,
-	EXYNOS5_GPA1 = EXYNOS5_GPIO_BASE0 + 0x0020,
-	EXYNOS5_GPA2 = EXYNOS5_GPIO_BASE0 + 0x0040,
-
-	EXYNOS5_GPB0 = EXYNOS5_GPIO_BASE0 + 0x0060,
-	EXYNOS5_GPB1 = EXYNOS5_GPIO_BASE0 + 0x0080,
-	EXYNOS5_GPB2 = EXYNOS5_GPIO_BASE0 + 0x00a0,
-	EXYNOS5_GPB3 = EXYNOS5_GPIO_BASE0 + 0x00c0,
-
-	EXYNOS5_GPC0 = EXYNOS5_GPIO_BASE0 + 0x00e0,
-	EXYNOS5_GPC1 = EXYNOS5_GPIO_BASE0 + 0x0100,
-	EXYNOS5_GPC2 = EXYNOS5_GPIO_BASE0 + 0x0120,
-	EXYNOS5_GPC3 = EXYNOS5_GPIO_BASE0 + 0x0140,
-
-	EXYNOS5_GPD0 = EXYNOS5_GPIO_BASE0 + 0x0160,
-	EXYNOS5_GPD1 = EXYNOS5_GPIO_BASE0 + 0x0180,
-
-	EXYNOS5_GPY0 = EXYNOS5_GPIO_BASE0 + 0x01a0,
-	EXYNOS5_GPY1 = EXYNOS5_GPIO_BASE0 + 0x01c0,
-	EXYNOS5_GPY2 = EXYNOS5_GPIO_BASE0 + 0x01e0,
-	EXYNOS5_GPY3 = EXYNOS5_GPIO_BASE0 + 0x0200,
-	EXYNOS5_GPY4 = EXYNOS5_GPIO_BASE0 + 0x0220,
-	EXYNOS5_GPY5 = EXYNOS5_GPIO_BASE0 + 0x0240,
-	EXYNOS5_GPY6 = EXYNOS5_GPIO_BASE0 + 0x0260,
-
-	EXYNOS5_GPX0 = EXYNOS5_GPIO_BASE0 + 0x0c00,
-	EXYNOS5_GPX1 = EXYNOS5_GPIO_BASE0 + 0x0c20,
-	EXYNOS5_GPX2 = EXYNOS5_GPIO_BASE0 + 0x0c40,
-	EXYNOS5_GPX3 = EXYNOS5_GPIO_BASE0 + 0x0c60,
-
-	/* base == EXYNOS_GPIO_BASE1 */
-	EXYNOS5_GPE0 = EXYNOS5_GPIO_BASE1 + 0x0000,
-	EXYNOS5_GPE1 = EXYNOS5_GPIO_BASE1 + 0x0020,
-
-	EXYNOS5_GPF0 = EXYNOS5_GPIO_BASE1 + 0x0040,
-	EXYNOS5_GPF1 = EXYNOS5_GPIO_BASE1 + 0x0060,
-
-	EXYNOS5_GPG0 = EXYNOS5_GPIO_BASE1 + 0x0080,
-	EXYNOS5_GPG1 = EXYNOS5_GPIO_BASE1 + 0x00a0,
-	EXYNOS5_GPG2 = EXYNOS5_GPIO_BASE1 + 0x00c0,
-
-	EXYNOS5_GPH0 = EXYNOS5_GPIO_BASE1 + 0x00e0,
-	EXYNOS5_GPH1 = EXYNOS5_GPIO_BASE1 + 0x0100,
-
-	/* base == EXYNOS_GPIO_BASE2 */
-	EXYNOS5_GPV0 = EXYNOS5_GPIO_BASE2 + 0x0000,
-	EXYNOS5_GPV1 = EXYNOS5_GPIO_BASE2 + 0x0020,
-	EXYNOS5_GPV2 = EXYNOS5_GPIO_BASE2 + 0x0060,
-	EXYNOS5_GPV3 = EXYNOS5_GPIO_BASE2 + 0x0080,
-	EXYNOS5_GPV4 = EXYNOS5_GPIO_BASE2 + 0x00c0,
-
-	/* base == EXYNOS_GPIO_BASE3 */
-	EXYNOS5_GPZ = EXYNOS5_GPIO_BASE3 + 0x0000,
+	EXYNOS5_GPA0 = EXYNOS5_GPIO_PART1_BASE + 0x0000,
+	EXYNOS5_GPA1 = EXYNOS5_GPIO_PART1_BASE + 0x0020,
+	EXYNOS5_GPA2 = EXYNOS5_GPIO_PART1_BASE + 0x0040,
+
+	EXYNOS5_GPB0 = EXYNOS5_GPIO_PART1_BASE + 0x0060,
+	EXYNOS5_GPB1 = EXYNOS5_GPIO_PART1_BASE + 0x0080,
+	EXYNOS5_GPB2 = EXYNOS5_GPIO_PART1_BASE + 0x00a0,
+	EXYNOS5_GPB3 = EXYNOS5_GPIO_PART1_BASE + 0x00c0,
+
+	EXYNOS5_GPC0 = EXYNOS5_GPIO_PART1_BASE + 0x00e0,
+	EXYNOS5_GPC1 = EXYNOS5_GPIO_PART1_BASE + 0x0100,
+	EXYNOS5_GPC2 = EXYNOS5_GPIO_PART1_BASE + 0x0120,
+	EXYNOS5_GPC3 = EXYNOS5_GPIO_PART1_BASE + 0x0140,
+
+	EXYNOS5_GPD0 = EXYNOS5_GPIO_PART1_BASE + 0x0160,
+	EXYNOS5_GPD1 = EXYNOS5_GPIO_PART1_BASE + 0x0180,
+
+	EXYNOS5_GPY0 = EXYNOS5_GPIO_PART1_BASE + 0x01a0,
+	EXYNOS5_GPY1 = EXYNOS5_GPIO_PART1_BASE + 0x01c0,
+	EXYNOS5_GPY2 = EXYNOS5_GPIO_PART1_BASE + 0x01e0,
+	EXYNOS5_GPY3 = EXYNOS5_GPIO_PART1_BASE + 0x0200,
+	EXYNOS5_GPY4 = EXYNOS5_GPIO_PART1_BASE + 0x0220,
+	EXYNOS5_GPY5 = EXYNOS5_GPIO_PART1_BASE + 0x0240,
+	EXYNOS5_GPY6 = EXYNOS5_GPIO_PART1_BASE + 0x0260,
+
+	EXYNOS5_GPX0 = EXYNOS5_GPIO_PART2_BASE + 0x0000,
+	EXYNOS5_GPX1 = EXYNOS5_GPIO_PART2_BASE + 0x0020,
+	EXYNOS5_GPX2 = EXYNOS5_GPIO_PART2_BASE + 0x0040,
+	EXYNOS5_GPX3 = EXYNOS5_GPIO_PART2_BASE + 0x0060,
+
+	EXYNOS5_GPE0 = EXYNOS5_GPIO_PART3_BASE + 0x0000,
+	EXYNOS5_GPE1 = EXYNOS5_GPIO_PART3_BASE + 0x0020,
+
+	EXYNOS5_GPF0 = EXYNOS5_GPIO_PART3_BASE + 0x0040,
+	EXYNOS5_GPF1 = EXYNOS5_GPIO_PART3_BASE + 0x0060,
+
+	EXYNOS5_GPG0 = EXYNOS5_GPIO_PART3_BASE + 0x0080,
+	EXYNOS5_GPG1 = EXYNOS5_GPIO_PART3_BASE + 0x00a0,
+	EXYNOS5_GPG2 = EXYNOS5_GPIO_PART3_BASE + 0x00c0,
+
+	EXYNOS5_GPH0 = EXYNOS5_GPIO_PART3_BASE + 0x00e0,
+	EXYNOS5_GPH1 = EXYNOS5_GPIO_PART3_BASE + 0x0100,
+
+	EXYNOS5_GPV0 = EXYNOS5_GPIO_PART4_BASE + 0x0000,
+	EXYNOS5_GPV1 = EXYNOS5_GPIO_PART4_BASE + 0x0020,
+	EXYNOS5_GPV2 = EXYNOS5_GPIO_PART4_BASE + 0x0060,
+	EXYNOS5_GPV3 = EXYNOS5_GPIO_PART4_BASE + 0x0080,
+
+	EXYNOS5_GPV4 = EXYNOS5_GPIO_PART5_BASE + 0x0000,
+
+	EXYNOS5_GPZ = EXYNOS5_GPIO_PART6_BASE + 0x0000,
 };
 
 enum {