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Diffstat (limited to 'src/cpu/samsung/exynos5420/setup.h')
-rw-r--r--src/cpu/samsung/exynos5420/setup.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/samsung/exynos5420/setup.h b/src/cpu/samsung/exynos5420/setup.h
index 794d4e14df..8f14a91602 100644
--- a/src/cpu/samsung/exynos5420/setup.h
+++ b/src/cpu/samsung/exynos5420/setup.h
@@ -791,6 +791,14 @@ struct exynos5_phy_control;
#define BRBRSVCONTROL_VAL 0x00000033
#define BRBRSVCONFIG_VAL 0x88778877
+/* Clock Gating Control (CGCONTROL) register */
+#define MEMIF_CG_EN (1 << 3) /* Memory interface clock gating */
+#define SCG_CG_EN (1 << 2) /* Scheduler clock gating */
+#define BUSIF_WR_CG_EN (1 << 1) /* Bus interface write channel clock gating */
+#define BUSIF_RD_CG_EN (1 << 0) /* Bus interface read channel clock gating */
+#define DMC_INTERNAL_CG (MEMIF_CG_EN | SCG_CG_EN | \
+ BUSIF_WR_CG_EN | BUSIF_RD_CG_EN)
+
/* DMC PHY Control0 register */
#define PHY_CONTROL0_RESET_VAL 0x0
#define MEM_TERM_EN (1 << 31) /* Termination enable for memory */