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-rw-r--r--src/cpu/x86/lapic/lapic.c28
-rw-r--r--src/cpu/x86/lapic/secondary.S2
2 files changed, 15 insertions, 15 deletions
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 555d74eecc..c8f83b0dd0 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -5,11 +5,11 @@
void setup_lapic(void)
{
- /* this is so interrupts work. This is very limited scope --
+ /* this is so interrupts work. This is very limited scope --
* linux will do better later, we hope ...
*/
- /* this is the first way we learned to do it. It fails on real SMP
- * stuff. So we have to do things differently ...
+ /* this is the first way we learned to do it. It fails on real SMP
+ * stuff. So we have to do things differently ...
* see the Intel mp1.4 spec, page A-3
*/
@@ -33,25 +33,25 @@ void setup_lapic(void)
lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
/* Put the local apic in virtual wire mode */
- lapic_write_around(LAPIC_SPIV,
+ lapic_write_around(LAPIC_SPIV,
(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
| LAPIC_SPIV_ENABLE);
- lapic_write_around(LAPIC_LVT0,
- (lapic_read_around(LAPIC_LVT0) &
- ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
- LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
+ lapic_write_around(LAPIC_LVT0,
+ (lapic_read_around(LAPIC_LVT0) &
+ ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+ LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
LAPIC_DELIVERY_MODE_MASK))
- | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
+ | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
LAPIC_DELIVERY_MODE_EXTINT)
);
- lapic_write_around(LAPIC_LVT1,
- (lapic_read_around(LAPIC_LVT1) &
- ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
- LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
+ lapic_write_around(LAPIC_LVT1,
+ (lapic_read_around(LAPIC_LVT1) &
+ ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+ LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
LAPIC_DELIVERY_MODE_MASK))
- | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
+ | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
LAPIC_DELIVERY_MODE_NMI)
);
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index dafc9a561c..5c1e7607e8 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -26,7 +26,7 @@ _secondary_start:
movl %eax, %cr0
ljmpl $0x10, $1f
-1:
+1:
.code32
movw $0x18, %ax
movw %ax, %ds