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-rw-r--r--src/cpu/x86/smm/smihandler.c7
-rw-r--r--src/cpu/x86/smm/smmhandler.S10
2 files changed, 4 insertions, 13 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 8f7ebfbf66..99594beae7 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -141,9 +141,10 @@ bool smm_region_overlaps_handler(const struct region *r)
* @param smm_revision revision of the smm state save map
*/
-void smi_handler(u32 smm_revision)
+void smi_handler(void)
{
unsigned int node;
+ const uint32_t smm_rev = smm_revision();
smm_state_save_area_t state_save;
u32 smm_base = SMM_BASE; /* ASEG */
@@ -171,7 +172,7 @@ void smi_handler(u32 smm_revision)
printk(BIOS_SPEW, "\nSMI# #%d\n", node);
- switch (smm_revision) {
+ switch (smm_rev) {
case 0x00030002:
case 0x00030007:
state_save.type = LEGACY;
@@ -199,7 +200,7 @@ void smi_handler(u32 smm_revision)
SMM_AMD64_ARCH_OFFSET, node);
break;
default:
- printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision);
+ printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_rev);
printk(BIOS_DEBUG, "SMI# not supported on your CPU\n");
/* Don't release lock, so no further SMI will happen,
* if we don't handle it anyways.
diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S
index 1cff23afe6..4cbfbfdfb1 100644
--- a/src/cpu/x86/smm/smmhandler.S
+++ b/src/cpu/x86/smm/smmhandler.S
@@ -165,10 +165,6 @@ untampered_lapic:
addl $SMM_STACK_SIZE, %ebx
movl %ebx, %esp
- /* Get SMM revision */
- movl $0xa8000 + 0x7efc, %ebx /* core 0 address */
- subl %ebp, %ebx /* subtract core X offset */
-
#if defined(__x86_64__)
/* Backup IA32_EFER. Preserves ebx. */
movl $(IA32_EFER), %ecx
@@ -179,13 +175,7 @@ untampered_lapic:
/* Enable long mode. Preserves ebx. */
#include <cpu/x86/64bit/entry64.inc>
- mov (%ebx), %rdi
-
-#else
- movl (%ebx), %eax
- pushl %eax
#endif
-
/* Call C handler */
call smi_handler