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-rw-r--r--src/cpu/x86/64bit/entry64.inc10
-rw-r--r--src/cpu/x86/Makefile.inc1
-rw-r--r--src/cpu/x86/sipi_vector.S13
3 files changed, 24 insertions, 0 deletions
diff --git a/src/cpu/x86/64bit/entry64.inc b/src/cpu/x86/64bit/entry64.inc
index 65c0fdc929..70255173f1 100644
--- a/src/cpu/x86/64bit/entry64.inc
+++ b/src/cpu/x86/64bit/entry64.inc
@@ -16,7 +16,12 @@
#endif
#include <cpu/x86/msr.h>
+#if defined(__RAMSTAGE__)
+#include <arch/ram_segs.h>
+#else
#include <arch/rom_segs.h>
+#endif
+
setup_longmode:
/* Get page table address */
@@ -42,7 +47,12 @@ setup_longmode:
movl %eax, %cr0
/* use long jump to switch to 64-bit code segment */
+#if defined(__RAMSTAGE__)
+ ljmp $RAM_CODE_SEG64, $__longmode_start
+#else
ljmp $ROM_CODE_SEG64, $__longmode_start
+
+#endif
.code64
__longmode_start:
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index 2f789f7581..0502c723ca 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -24,6 +24,7 @@ ifeq ($(CONFIG_PARALLEL_MP),y)
$(TARGET_STAGE)-srcs += $(SIPI_BIN).manual
endif
rmodules_$(ARCH-$(TARGET_STAGE)-y)-$(CONFIG_PARALLEL_MP) += sipi_vector.S
+rmodules_$(ARCH-$(TARGET_STAGE)-y)-generic-ccopts += $($(TARGET_STAGE)-generic-ccopts)
$(SIPI_DOTO): $(call src-to-obj,rmodules_$(ARCH-$(TARGET_STAGE)-y),src/cpu/x86/sipi_vector.S)
$(LD_rmodules_$(ARCH-$(TARGET_STAGE)-y)) -nostdlib -r -o $@ $^
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index ba1ecb7de6..bda49cc029 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -192,11 +192,24 @@ load_msr:
mov %eax, %cr4
#endif
+#ifdef __x86_64__
+ /* entry64.inc preserves ebx. */
+#include <cpu/x86/64bit/entry64.inc>
+
+ mov %rsi, %rdi /* cpu_num */
+
+ movl c_handler, %eax
+ call *%rax
+#else
/* c_handler(cpu_num), preserve proper stack alignment */
sub $12, %esp
push %esi /* cpu_num */
+
mov c_handler, %eax
call *%eax
+#endif
+
+
halt_jump:
hlt
jmp halt_jump