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-rw-r--r--src/cpu/samsung/exynos5420/bootblock.c4
-rw-r--r--src/cpu/samsung/exynos5420/cpu.h2
2 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/samsung/exynos5420/bootblock.c b/src/cpu/samsung/exynos5420/bootblock.c
index 2c42b03ce7..97e85f1fd6 100644
--- a/src/cpu/samsung/exynos5420/bootblock.c
+++ b/src/cpu/samsung/exynos5420/bootblock.c
@@ -24,7 +24,7 @@
#include "cpu.h"
/* convenient shorthand (in MB) */
-#define SRAM_START (0x02020000 >> 20)
+#define SRAM_START (EXYNOS5_SRAM_BASE >> 20)
#define SRAM_SIZE 1
#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
@@ -43,7 +43,7 @@ void bootblock_cpu_init(void)
/* set up dcache and MMU */
mmu_init();
- mmu_config_range(0, SRAM_START, DCACHE_OFF);
+ mmu_disable_range(0, SRAM_START);
mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK);
mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF);
dcache_mmu_enable();
diff --git a/src/cpu/samsung/exynos5420/cpu.h b/src/cpu/samsung/exynos5420/cpu.h
index e3c7f1be38..847800db5e 100644
--- a/src/cpu/samsung/exynos5420/cpu.h
+++ b/src/cpu/samsung/exynos5420/cpu.h
@@ -22,6 +22,8 @@
#include <arch/io.h>
+#define EXYNOS5_SRAM_BASE 0x02020000
+
/* Base address registers */
#define EXYNOS5420_GPIO_PART6_BASE 0x03860000 /* Z0 */
#define EXYNOS5_PRO_ID 0x10000000