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-rw-r--r--src/device/Kconfig6
-rw-r--r--src/device/pci_rom.c10
2 files changed, 7 insertions, 9 deletions
diff --git a/src/device/Kconfig b/src/device/Kconfig
index 011354530d..70a362f20e 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -84,13 +84,13 @@ config ALWAYS_LOAD_OPROM
are needed for the kernel's display driver to know how a piece of
hardware is configured to be used.
-config ON_DEVICE_ROM_RUN
- bool "Run Option ROMs on PCI devices"
+config ON_DEVICE_ROM_LOAD
+ bool "Load Option ROMs on PCI devices"
default n if PAYLOAD_SEABIOS
default y if !PAYLOAD_SEABIOS
depends on PCI
help
- Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
+ Load Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
If disabled, only Option ROMs stored in CBFS will be executed by
coreboot. If you are concerned about security, you might want to
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index ad6c7e4634..8366fea357 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -52,6 +52,10 @@ struct rom_header *pci_rom_probe(struct device *dev)
if (rom_header) {
printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
dev_path(dev), rom_header);
+ } else if (!IS_ENABLED(CONFIG_ON_DEVICE_ROM_LOAD)) {
+ printk(BIOS_DEBUG, "PCI Option ROM loading disabled "
+ "for %s\n", dev_path(dev));
+ return NULL;
} else {
uintptr_t rom_address;
@@ -70,15 +74,9 @@ struct rom_header *pci_rom_probe(struct device *dev)
rom_address|PCI_ROM_ADDRESS_ENABLE);
}
-#if CONFIG_ON_DEVICE_ROM_RUN
printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n",
dev_path(dev), (unsigned long)rom_address);
rom_header = (struct rom_header *)rom_address;
-#else
- printk(BIOS_DEBUG, "Option ROM execution disabled "
- "for %s\n", dev_path(dev));
- return NULL;
-#endif
}
printk(BIOS_SPEW, "PCI expansion ROM, signature 0x%04x, "