diff options
Diffstat (limited to 'src/drivers/generic/bayhub/bh720.h')
-rw-r--r-- | src/drivers/generic/bayhub/bh720.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/drivers/generic/bayhub/bh720.h b/src/drivers/generic/bayhub/bh720.h new file mode 100644 index 0000000000..b6fd2738cd --- /dev/null +++ b/src/drivers/generic/bayhub/bh720.h @@ -0,0 +1,47 @@ +/* + * Driver for BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge + * + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +enum { + BH720_PROTECT = 0xd0, + BH720_PROTECT_LOCK_OFF = 0, + BH720_PROTECT_LOCK_ON = BIT(0), + BH720_PROTECT_OFF = 0, + BH720_PROTECT_ON = BIT(31), + + BH720_LINK_CTRL = 0x90, + BH720_LINK_CTRL_L0_ENABLE = BIT(0), + BH720_LINK_CTRL_L1_ENABLE = BIT(1), + BH720_LINK_CTRL_CLKREQ = BIT(8), + + BH720_MISC2 = 0xf0, + BH720_MISC2_ASPM_DISABLE = BIT(0), + BH720_MISC2_APSM_CLKREQ_L1 = BIT(7), + BH720_MISC2_APSM_PHY_L1 = BIT(10), + BH720_MISC2_APSM_MORE = BIT(12), + + BH720_MEM_RW_DATA = 0x200, + BH720_MEM_RW_ADR = 0x204, + BH720_MEM_ACCESS_EN = 0x208, + BH720_PCR = 0x304, + BH720_PCR_DATA_CMD_DRV_MAX = 7, + BH720_PCR_CLK_DRV_MAX = 7, + + BH720_RTD3_L1 = 0x3e0, + BH720_RTD3_L1_DISABLE_L1 = BIT(28), +}; + +void bh720_driving_strength(struct device *dev); |