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Diffstat (limited to 'src/drivers/intel/fsp1_1/include/fsp/car.h')
-rw-r--r--src/drivers/intel/fsp1_1/include/fsp/car.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h
new file mode 100644
index 0000000000..8234b37ea8
--- /dev/null
+++ b/src/drivers/intel/fsp1_1/include/fsp/car.h
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef FSP1_1_CAR_H
+#define FSP1_1_CAR_H
+
+#include <arch/cpu.h>
+#include <fsp/api.h>
+#include <stdint.h>
+
+/* cache-as-ram support for FSP 1.1. */
+struct cache_as_ram_params {
+ uint64_t tsc;
+ uint32_t bist;
+ FSP_INFO_HEADER *fih;
+ uintptr_t bootloader_car_start;
+ uintptr_t bootloader_car_end;
+};
+
+/* Entry points from the cache-as-ram assembly code. */
+asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params);
+asmlinkage void after_cache_as_ram(void *chipset_context);
+/* Per stage calls from the above two functions. The void * return from
+ * cache_as_ram_stage_main() is the stack pointer to use in ram after
+ * exiting cache-as-ram mode. */
+void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih);
+void after_cache_as_ram_stage(void);
+
+/* Mainboard and SoC initialization prior to console. */
+void car_mainboard_pre_console_init(void);
+void car_soc_pre_console_init(void);
+/* Mainboard and SoC initialization post console initialization. */
+void car_mainboard_post_console_init(void);
+void car_soc_post_console_init(void);
+
+#endif