diff options
Diffstat (limited to 'src/drivers/intel/gma')
| -rw-r--r-- | src/drivers/intel/gma/i915.h | 14 | ||||
| -rw-r--r-- | src/drivers/intel/gma/i915_reg.h | 3 | ||||
| -rw-r--r-- | src/drivers/intel/gma/intel_ddi.c | 8 | ||||
| -rw-r--r-- | src/drivers/intel/gma/intel_dp.c | 22 |
4 files changed, 47 insertions, 0 deletions
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h index 1aed2bfb09..12a7ee02bb 100644 --- a/src/drivers/intel/gma/i915.h +++ b/src/drivers/intel/gma/i915.h @@ -56,6 +56,13 @@ enum pipe { I915_NUM_PIPES }; +enum transcoder { + TRANSCODER_A = 0, + TRANSCODER_B, + TRANSCODER_C, + TRANSCODER_EDP = 0xF, +}; + /* debug enums. These are for printks that, due to their place in the * middle of graphics device IO, might change timing. Use with care * or not at all. @@ -160,6 +167,7 @@ struct intel_dp { u32 stride; struct intel_dp_m_n m_n; u32 flags; + u32 transcoder; }; /* we may yet need these. */ @@ -221,3 +229,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, int type, int lane_count, int pf_sz); + +enum transcoder intel_ddi_get_transcoder(enum port port, + enum pipe pipe); + +void intel_dp_set_m_n_regs(struct intel_dp *intel_dp); +void intel_dp_set_resolution(struct intel_dp *intel_dp); diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index d0c8c85f94..8c08d9f9da 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -3839,6 +3839,9 @@ #define _TRANSACONF 0xf0008 #define _TRANSBCONF 0xf1008 #define TRANSCONF(plane) _PIPE(plane, _TRANSACONF, _TRANSBCONF) +#define _PCH_TRANSACONF 0xf0008 +#define _PCH_TRANSBCONF 0xf1008 +#define PCH_TRANSCONF(plane) _PIPE(plane, _PCH_TRANSACONF, _PCH_TRANSBCONF) #define TRANS_DISABLE (0<<31) #define TRANS_ENABLE (1<<31) #define TRANS_STATE_MASK (1<<30) diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index f1a40f1e32..ff8ad4cf9e 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -223,3 +223,11 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, return temp; } + +enum transcoder intel_ddi_get_transcoder(enum port port, + enum pipe pipe) +{ + if (port == PORT_A) + return TRANSCODER_EDP; + return (enum transcoder)pipe; +} diff --git a/src/drivers/intel/gma/intel_dp.c b/src/drivers/intel/gma/intel_dp.c index 0def7717ac..419e49ed2d 100644 --- a/src/drivers/intel/gma/intel_dp.c +++ b/src/drivers/intel/gma/intel_dp.c @@ -1739,3 +1739,25 @@ intel_dp_get_max_downspread(struct intel_dp *intel_dp, u8 *max_downspread) return 1; } +void intel_dp_set_m_n_regs(struct intel_dp *intel_dp) +{ + io_i915_write32(0x7e4a0000, PIPE_DATA_M1(intel_dp->transcoder)); + /* io_i915_write32(0x00800000,0x6f034); */ + /* Write to 0x6f030 has to be 0x7e4ayyyy -- First four hex digits are important. + However, with our formula we always see values 0x7e43yyyy (1366 panel) and + 0x7e42yyy (1280 panel) */ + /* io_i915_write32(TU_SIZE(intel_dp->m_n.tu) | intel_dp->m_n.gmch_m,PIPE_DATA_M1(intel_dp->transcoder)); */ + io_i915_write32(intel_dp->m_n.gmch_n, PIPE_DATA_N1(intel_dp->transcoder)); + io_i915_write32(intel_dp->m_n.link_m, PIPE_LINK_M1(intel_dp->transcoder)); + io_i915_write32(intel_dp->m_n.link_n, PIPE_LINK_N1(intel_dp->transcoder)); +} + +void intel_dp_set_resolution(struct intel_dp *intel_dp) +{ + io_i915_write32(intel_dp->htotal, HTOTAL(intel_dp->transcoder)); + io_i915_write32(intel_dp->hblank, HBLANK(intel_dp->transcoder)); + io_i915_write32(intel_dp->hsync, HSYNC(intel_dp->transcoder)); + io_i915_write32(intel_dp->vtotal, VTOTAL(intel_dp->transcoder)); + io_i915_write32(intel_dp->vblank, VBLANK(intel_dp->transcoder)); + io_i915_write32(intel_dp->vsync, VSYNC(intel_dp->transcoder)); +} |