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-rw-r--r--src/drivers/intel/gma/Kconfig16
-rw-r--r--src/drivers/intel/gma/vbt.c3
2 files changed, 18 insertions, 1 deletions
diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig
index 9c0f22783c..23290d56f4 100644
--- a/src/drivers/intel/gma/Kconfig
+++ b/src/drivers/intel/gma/Kconfig
@@ -2,6 +2,7 @@
## This file is part of the coreboot project.
##
## Copyright 2013 Google Inc.
+## Copyright 2016-2017 secunet Security Networks AG
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -37,6 +38,21 @@ config INTEL_GMA_ACPI
bool
default n
+config INTEL_GMA_SSC_ALTERNATE_REF
+ bool
+ default n
+ help
+ Set when the SSC reference clock for LVDS runs at a different fre-
+ quency than the general display reference clock.
+
+ To be set by northbridge or mainboard Kconfig. For most platforms,
+ there is no choice, i.e. for i945 and gm45 the SSC reference always
+ differs from the display reference clock (i945: 66Mhz SSC vs. 48MHz
+ DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and newer, it's
+ the same frequency for SSC/non-SSC (120MHz). The only, currently
+ supported platform with a choice seems to be Pineview, where the
+ alternative is 100MHz vs. the default 96MHz.
+
config GFX_GMA_CPU
string
default "Skylake" if SOC_INTEL_SKYLAKE
diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c
index 0d76afee48..d8dd9301a7 100644
--- a/src/drivers/intel/gma/vbt.c
+++ b/src/drivers/intel/gma/vbt.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2013, 2014 Vladimir Serbinenko
+ * Copyright (C) 2017 secunet Security Networks AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -59,7 +60,7 @@ static size_t generate_vbt(const struct i915_gpu_controller_info *const conf,
genfeat->flexaim = 1;
genfeat->download_ext_vbt = 1;
genfeat->enable_ssc = conf->use_spread_spectrum_clock;
- genfeat->ssc_freq = !conf->link_frequency_270_mhz;
+ genfeat->ssc_freq = IS_ENABLED(CONFIG_INTEL_GMA_SSC_ALTERNATE_REF);
genfeat->rsvd10 = 0x4;
genfeat->legacy_monitor_detect = 1;
genfeat->int_crt_support = 1;