diff options
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 5 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h | 33 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/ppi/Kconfig | 24 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/ppi/Makefile.inc | 16 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c | 167 |
5 files changed, 244 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 2b98542057..4404b4c33d 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -183,10 +183,13 @@ config FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS config FSP_PEIM_TO_PEIM_INTERFACE bool + select FSP_USES_MP_SERVICES_PPI help This option allows SOC user to create specific PPI for Intel FSP usage, coreboot will provide required PPI structure definitions - along with all APIs as per EFI specification. + along with all APIs as per EFI specification. So far this feature + is limited till EFI_PEI_MP_SERVICE_PPI and this option might be + useful to add further PPI if required. if FSP_PEIM_TO_PEIM_INTERFACE source "src/drivers/intel/fsp2_0/ppi/Kconfig" diff --git a/src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h b/src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h new file mode 100644 index 0000000000..8ad5660d59 --- /dev/null +++ b/src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MP_SERVICE_PPI_H +#define MP_SERVICE_PPI_H + +/* + * This file to implement MP_SERVICES_PPI for Intel FSP to use. + * More details about this PPI can be found here : + * http://github.com/tianocore/edk2/blob/master/MdePkg/Include/Ppi/MpServices.h + */ +#include <efi/efi_datatype.h> +#include <fsp/soc_binding.h> + +/* + * SOC must call this function to get required EFI_PEI_MP_SERVICES_PPI + * structure. + */ +efi_pei_mp_services_ppi *mp_fill_ppi_services_data(void); + +#endif /* MP_SERVICE_PPI_H */ diff --git a/src/drivers/intel/fsp2_0/ppi/Kconfig b/src/drivers/intel/fsp2_0/ppi/Kconfig new file mode 100644 index 0000000000..a95877e830 --- /dev/null +++ b/src/drivers/intel/fsp2_0/ppi/Kconfig @@ -0,0 +1,24 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Intel Corp. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +config FSP_USES_MP_SERVICES_PPI + bool + default n + depends on SOC_INTEL_COMMON_BLOCK_CPU_MPINIT + help + This option allows SoC user to create MP service PPI for Intel + FSP usage, coreboot will provide EFI_PEI_MP_SERVICES_PPI structure + definitions along with all APIs as per EDK2 specification. Intel FSP + will use this PPI to run CPU feature programming on APs. diff --git a/src/drivers/intel/fsp2_0/ppi/Makefile.inc b/src/drivers/intel/fsp2_0/ppi/Makefile.inc new file mode 100644 index 0000000000..67c4966dc7 --- /dev/null +++ b/src/drivers/intel/fsp2_0/ppi/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Intel Corp. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ramstage-$(CONFIG_FSP_USES_MP_SERVICES_PPI) += mp_service_ppi.c diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c new file mode 100644 index 0000000000..fe6c4b36b8 --- /dev/null +++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c @@ -0,0 +1,167 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <assert.h> +#include <cpu/cpu.h> +#include <cpu/x86/mp.h> +#include <cpu/x86/lapic.h> +#include <cpu/intel/microcode.h> +#include <fsp/api.h> +#include <fsp/ppi/mp_service_ppi.h> +#include <intelblocks/cpulib.h> +#include <intelblocks/mp_init.h> + +#define BSP_CPU_SLOT 0 + +static efi_return_status_t mp_get_number_of_processors(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_uintn_t *number_of_processors, + efi_uintn_t *number_of_enabled_processors) +{ + if (number_of_processors == NULL || number_of_enabled_processors == + NULL) + return FSP_INVALID_PARAMETER; + + *number_of_processors = get_cpu_count(); + *number_of_enabled_processors = get_cpu_count(); + + return FSP_SUCCESS; +} + +static efi_return_status_t mp_get_processor_info(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_uintn_t processor_number, + efi_processor_information *processor_info_buffer) +{ + if (cpu_index() < 0) + return FSP_DEVICE_ERROR; + + if (processor_info_buffer == NULL) + return FSP_INVALID_PARAMETER; + + if (processor_number >= get_cpu_count()) + return FSP_NOT_FOUND; + + processor_info_buffer->ProcessorId = lapicid(); + + processor_info_buffer->StatusFlag = PROCESSOR_HEALTH_STATUS_BIT + | PROCESSOR_ENABLED_BIT; + + if (processor_number == BSP_CPU_SLOT) + processor_info_buffer->StatusFlag |= PROCESSOR_AS_BSP_BIT; + + /* TODO: Fill EFI_CPU_PHYSICAL_LOCATION structure information */ + return FSP_SUCCESS; +} + +static efi_return_status_t mp_startup_all_aps(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_ap_procedure procedure, efi_boolean_t ignored3, + efi_uintn_t timeout_usec, void *argument) +{ + if (cpu_index() < 0) + return FSP_DEVICE_ERROR; + + if (procedure == NULL) + return FSP_INVALID_PARAMETER; + + if (mp_run_on_aps((void *)procedure, argument, + MP_RUN_ON_ALL_CPUS, timeout_usec)) { + printk(BIOS_DEBUG, "%s: Exit with Failure\n", __func__); + return FSP_NOT_STARTED; + } + + return FSP_SUCCESS; +} + +static efi_return_status_t mp_startup_this_ap(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_ap_procedure procedure, efi_uintn_t processor_number, + efi_uintn_t timeout_usec, void *argument) +{ + if (cpu_index() < 0) + return FSP_DEVICE_ERROR; + + if (processor_number > get_cpu_count()) + return FSP_NOT_FOUND; + + if (processor_number == BSP_CPU_SLOT) + return FSP_INVALID_PARAMETER; + + if (procedure == NULL) + return FSP_INVALID_PARAMETER; + + if (mp_run_on_aps((void *)procedure, argument, + processor_number, timeout_usec)) { + printk(BIOS_DEBUG, "%s: Exit with Failure\n", __func__); + return FSP_NOT_STARTED; + } + + return FSP_SUCCESS; +} + +static efi_return_status_t mp_switch_bsp(const efi_pei_services **ignored1, + efi_pei_mp_services_ppi *ignored2, efi_uintn_t ignored3, + efi_boolean_t ignored4) +{ + /* FSP don't need this API hence return unsupported */ + return FSP_UNSUPPORTED; +} + +static efi_return_status_t mp_enable_disable_ap(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_uintn_t ignored3, efi_boolean_t ignored4, efi_uint32_t *ignored5) +{ + /* FSP don't need this API hence return unsupported */ + return FSP_UNSUPPORTED; +} + +static efi_return_status_t mp_identify_processor(const + efi_pei_services **ignored1, efi_pei_mp_services_ppi *ignored2, + efi_uintn_t *processor_number) +{ + int index; + + if (processor_number == NULL) + return FSP_INVALID_PARAMETER; + + index = cpu_index(); + + if (index < 0) + return FSP_DEVICE_ERROR; + + *processor_number = index; + + return FSP_SUCCESS; +} + +/* + * EDK2 UEFIPKG Open Source MP Service PPI to be installed + */ + +static efi_pei_mp_services_ppi mp_service_ppi = { + mp_get_number_of_processors, + mp_get_processor_info, + mp_startup_all_aps, + mp_startup_this_ap, + mp_switch_bsp, + mp_enable_disable_ap, + mp_identify_processor, +}; + +efi_pei_mp_services_ppi *mp_fill_ppi_services_data(void) +{ + return &mp_service_ppi; +} |