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-rw-r--r--src/drivers/intel/fsp1_1/Kconfig9
-rw-r--r--src/drivers/intel/fsp1_1/cache_as_ram.inc4
2 files changed, 2 insertions, 11 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 5936f60065..4ae372746e 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -80,15 +80,6 @@ config FSP_LOC
endif #HAVE_FSP_BIN
-config CACHE_ROM_SIZE_OVERRIDE
- hex "Cache ROM Size"
- default CBFS_SIZE
- help
- This is the size of the cachable area that is passed into the FSP in
- the early initialization. Typically this should be the size of the
- CBFS area, but the size must be a power of 2 whereas the CBFS size
- does not have this limitation.
-
config DISPLAY_FAST_BOOT_DATA
bool "Display fast boot data"
default n
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 1d63376ec5..7d68f3210f 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -212,8 +212,8 @@ fake_fsp_stack:
CAR_init_params:
.long CONFIG_CPU_MICROCODE_CBFS_LOC /* Microcode Location */
.long CONFIG_CPU_MICROCODE_CBFS_LEN /* Microcode Length */
- .long 0xFFFFFFFF - CONFIG_CBFS_SIZE + 1 /* Firmware Location */
- .long CONFIG_CBFS_SIZE /* Total Firmware Length */
+ .long 0xFFFFFFFF - CONFIG_ROM_SIZE + 1 /* Firmware Location */
+ .long CONFIG_ROM_SIZE /* Total Firmware Length */
CAR_init_stack:
.long CAR_init_done