3 files changed, 21 insertions, 17 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index c959e57cd1..9b2c463878 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -23,14 +23,6 @@ if PLATFORM_USES_FSP1_1
 
 comment "Intel FSP 1.1"
 
-config DCACHE_RAM_BASE
-	hex
-	default 0xfef00000
-
-config DCACHE_RAM_SIZE
-	hex
-	default 0x4000
-
 config HAVE_FSP_BIN
 	bool "Should the Intel FSP binary be added to the flash image"
 	help
diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S
index 85a0a8c200..eb99157959 100644
--- a/src/drivers/intel/fsp1_1/after_raminit.S
+++ b/src/drivers/intel/fsp1_1/after_raminit.S
@@ -20,7 +20,6 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/post_code.h>
 
-.extern fih_car
 /*
  * This is the common entry point after DRAM has been initialized.
  */
@@ -31,6 +30,14 @@
 	/* Switch to the stack in RAM */
 	movl	%eax, %esp
 
+#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+
+	/* SOC specific NEM */
+	#include <soc/car_teardown.S>
+
+#else
+.extern fih_car
+
 	post_code(POST_FSP_TEMP_RAM_EXIT)
 
 	/* Calculate TempRamExit entry into FSP */
@@ -56,8 +63,8 @@
 	 */
 	movb	$0xBC, %ah
 	jmp	.Lhlt
-
 1:
+#endif
 	/* Display the MTRRs */
 	call	soc_display_mtrrs
 
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 35abdb48da..6e7e50b992 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -33,17 +33,22 @@
 	 * mm0:  low 32-bits of TSC value
 	 * mm1:  high 32-bits of TSC value
 	 */
-
-	mov	%eax, %edi
-
+	movl	%eax, %edi
 cache_as_ram:
 	post_code(0x20)
 
+#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+
 	/*
-	 * edi:  BIST value
-	 * mm0:  low 32-bits of TSC value
-	 * mm1:  high 32-bits of TSC value
+	 * SOC specific setup
+	 * NOTE: This has to preserve the registers
+	 * mm0, mm1 and edi.
 	 */
+	#include <soc/car_setup.S>
+
+	post_code(0x28)
+
+#endif
 
 	/*
 	 * Find the FSP binary in cbfs.
@@ -143,7 +148,7 @@ CAR_init_done:
 	rep	stosl
 
 before_romstage:
-	post_code(0x23)
+	post_code(0x2A)
 
 	/* Call cache_as_ram_main(struct cache_as_ram_params *) */
 	call	cache_as_ram_main