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-rw-r--r--src/drivers/uart/Kconfig8
-rw-r--r--src/drivers/uart/oxpcie_early.c5
-rw-r--r--src/drivers/uart/pl011.c5
-rw-r--r--src/drivers/uart/uart8250io.c17
-rw-r--r--src/drivers/uart/uart8250mem.c5
-rw-r--r--src/drivers/uart/util.c16
6 files changed, 29 insertions, 27 deletions
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig
index cb129b0643..4faa48d9f0 100644
--- a/src/drivers/uart/Kconfig
+++ b/src/drivers/uart/Kconfig
@@ -20,6 +20,13 @@ config UART_OVERRIDE_INPUT_CLOCK_DIVIDER
Set to "y" when the platform overrides the uart_input_clock_divider
routine.
+config UART_OVERRIDE_REFCLK
+ boolean
+ default n
+ help
+ Set to "y" when the platform overrides the uart_platform_refclk
+ routine.
+
config DRIVERS_UART_8250MEM
bool
default n
@@ -39,6 +46,7 @@ config DRIVERS_UART_OXPCIE
depends on PCI
select DRIVERS_UART_8250MEM
select EARLY_PCI_BRIDGE
+ select UART_OVERRIDE_REFCLK
help
Support for Oxford OXPCIe952 serial port PCIe cards.
Currently only devices with the vendor ID 0x1415 and device ID
diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c
index 6582a9e5ab..0a778d98c7 100644
--- a/src/drivers/uart/oxpcie_early.c
+++ b/src/drivers/uart/oxpcie_early.c
@@ -92,10 +92,7 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
- if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK))
- serial.input_hertz = uart_platform_refclk();
- else
- serial.input_hertz = 0;
+ serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c
index 808cb46538..0c7ac08ed5 100644
--- a/src/drivers/uart/pl011.c
+++ b/src/drivers/uart/pl011.c
@@ -48,10 +48,7 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
- if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK))
- serial.input_hertz = uart_platform_refclk();
- else
- serial.input_hertz = 0;
+ serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c
index 69244f58df..89c447658a 100644
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -27,16 +27,6 @@
/* Should support 8250, 16450, 16550, 16550A type UARTs */
-/* Nominal values only, good for the range of choices Kconfig offers for
- * set of standard baudrates.
- */
-
-/* Multiply the maximim baud-rate by the default oversample rate to compute
- * the default input clock to the UART. The uart_baudrate_divisor divides
- * by the oversample clock to determine the final baud-rate.
- */
-#define BAUDRATE_REFCLK (115200 * 16)
-
/* Expected character delay at 1200bps is 9ms for a working UART
* and no flow-control. Assume UART as stuck if shift register
* or FIFO takes more than 50ms per character to appear empty.
@@ -115,7 +105,7 @@ uintptr_t uart_platform_base(int idx)
void uart_init(int idx)
{
unsigned int div;
- div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK,
+ div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(),
uart_input_clock_divider());
uart8250_init(uart_platform_base(idx), div);
}
@@ -143,10 +133,7 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
- if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK))
- serial.input_hertz = uart_platform_refclk();
- else
- serial.input_hertz = 0;
+ serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c
index 4b87756d0b..cf58423b86 100644
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -157,10 +157,7 @@ void uart_fill_lb(void *data)
serial.regwidth = sizeof(uint32_t);
else
serial.regwidth = sizeof(uint8_t);
- if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK))
- serial.input_hertz = uart_platform_refclk();
- else
- serial.input_hertz = 0;
+ serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c
index 5e8d223252..86da8dc746 100644
--- a/src/drivers/uart/util.c
+++ b/src/drivers/uart/util.c
@@ -59,3 +59,19 @@ unsigned int uart_input_clock_divider(void)
return 16;
}
#endif
+
+#if !IS_ENABLED(CONFIG_UART_OVERRIDE_REFCLK)
+unsigned int uart_platform_refclk(void)
+{
+ /* Specify the default input clock frequency for the UART.
+ *
+ * The older UART's used an input clock frequency of 1.8432 MHz which
+ * with the 16x oversampling provided the maximum baud-rate of 115200.
+ * Specify this as maximum baud-rate multiplied by oversample so that
+ * it is obvious that the maximum baud rate is 115200 when divided by
+ * oversample clock. Also note that crystal on the board does not
+ * change when software selects another input clock divider.
+ */
+ return 115200 * 16;
+}
+#endif