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-rw-r--r--src/ec/google/wilco/Makefile.inc1
-rw-r--r--src/ec/google/wilco/bootblock.c52
-rw-r--r--src/ec/google/wilco/bootblock.h29
3 files changed, 82 insertions, 0 deletions
diff --git a/src/ec/google/wilco/Makefile.inc b/src/ec/google/wilco/Makefile.inc
index 33eefd555b..2e1c0d4c7c 100644
--- a/src/ec/google/wilco/Makefile.inc
+++ b/src/ec/google/wilco/Makefile.inc
@@ -1,5 +1,6 @@
ifeq ($(CONFIG_EC_GOOGLE_WILCO),y)
+bootblock-y += bootblock.c
ramstage-y += chip.c commands.c mailbox.c
smm-y += commands.c mailbox.c smihandler.c
diff --git a/src/ec/google/wilco/bootblock.c b/src/ec/google/wilco/bootblock.c
new file mode 100644
index 0000000000..dadc5c9a77
--- /dev/null
+++ b/src/ec/google/wilco/bootblock.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <swab.h>
+
+#include "bootblock.h"
+
+#define PNP_CFG_IDX 0x2e
+#define PNP_LDN_SERIAL 0x0d
+
+static void pnp_enter_conf_state(pnp_devfn_t dev)
+{
+ outb(0x55, PNP_CFG_IDX);
+ outb(0x55, PNP_CFG_IDX);
+}
+
+static void pnp_exit_conf_state(pnp_devfn_t dev)
+{
+ outb(0xaa, PNP_CFG_IDX);
+}
+
+static void wilco_ec_serial_init(void)
+{
+ pnp_devfn_t dev = PNP_DEV(PNP_CFG_IDX, PNP_LDN_SERIAL);
+
+ pnp_enter_conf_state(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 1);
+ pnp_set_iobase(dev, PNP_IDX_IO1, cpu_to_be16(CONFIG_TTYS0_BASE));
+ pnp_write_config(dev, PNP_IDX_IO0, 1);
+ pnp_exit_conf_state(dev);
+}
+
+void wilco_ec_early_init(void)
+{
+ if (IS_ENABLED(CONFIG_DRIVERS_UART_8250IO))
+ wilco_ec_serial_init();
+}
diff --git a/src/ec/google/wilco/bootblock.h b/src/ec/google/wilco/bootblock.h
new file mode 100644
index 0000000000..8130dd76b7
--- /dev/null
+++ b/src/ec/google/wilco/bootblock.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef EC_GOOGLE_WILCO_BOOTBLOCK_H
+#define EC_GOOGLE_WILCO_BOOTBLOCK_H
+
+/**
+ * wilco_ec_early_init
+ *
+ * This function performs early initialization of the EC:
+ *
+ * - Enable EC UART passthru for COM1 if serial console support
+ * is enabled with CONFIG_DRIVERS_UART_8250IO.
+ */
+void wilco_ec_early_init(void);
+
+#endif /* EC_GOOGLE_WILCO_BOOTBLOCK_H */