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-rw-r--r--src/ec/quanta/Kconfig1
-rw-r--r--src/ec/quanta/Makefile.inc1
-rw-r--r--src/ec/quanta/ene_kb3940q/Kconfig4
-rw-r--r--src/ec/quanta/ene_kb3940q/Makefile.inc4
-rw-r--r--src/ec/quanta/ene_kb3940q/acpi/ac.asl39
-rw-r--r--src/ec/quanta/ene_kb3940q/acpi/battery.asl159
-rw-r--r--src/ec/quanta/ene_kb3940q/acpi/ec.asl280
-rw-r--r--src/ec/quanta/ene_kb3940q/acpi/superio.asl57
-rw-r--r--src/ec/quanta/ene_kb3940q/chip.h35
-rw-r--r--src/ec/quanta/ene_kb3940q/ec.c188
-rw-r--r--src/ec/quanta/ene_kb3940q/ec.h213
11 files changed, 981 insertions, 0 deletions
diff --git a/src/ec/quanta/Kconfig b/src/ec/quanta/Kconfig
new file mode 100644
index 0000000000..f29ec00b83
--- /dev/null
+++ b/src/ec/quanta/Kconfig
@@ -0,0 +1 @@
+source src/ec/quanta/ene_kb3940q/Kconfig
diff --git a/src/ec/quanta/Makefile.inc b/src/ec/quanta/Makefile.inc
new file mode 100644
index 0000000000..1c39f22429
--- /dev/null
+++ b/src/ec/quanta/Makefile.inc
@@ -0,0 +1 @@
+subdirs-$(CONFIG_EC_QUANTA_ENE_KB3940Q) += ene_kb3940q
diff --git a/src/ec/quanta/ene_kb3940q/Kconfig b/src/ec/quanta/ene_kb3940q/Kconfig
new file mode 100644
index 0000000000..4258948d7a
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/Kconfig
@@ -0,0 +1,4 @@
+config EC_QUANTA_ENE_KB3940Q
+ bool
+ help
+ Interface to QUANTA ENE KB3940Q Embedded Controller.
diff --git a/src/ec/quanta/ene_kb3940q/Makefile.inc b/src/ec/quanta/ene_kb3940q/Makefile.inc
new file mode 100644
index 0000000000..1ce9a46f88
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/Makefile.inc
@@ -0,0 +1,4 @@
+ramstage-y += ec.c
+smm-y += ec.c
+
+smm-y += ../../../lib/delay.c
diff --git a/src/ec/quanta/ene_kb3940q/acpi/ac.asl b/src/ec/quanta/ene_kb3940q/acpi/ac.asl
new file mode 100644
index 0000000000..8c85fc335c
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/acpi/ac.asl
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+// Scope (EC0)
+
+Device (AC)
+{
+ Name (_HID, "ACPI0003")
+ Name (_PCL, Package () { \_SB })
+
+ Method (_PSR)
+ {
+ Store(ADPT, Local0)
+ Return(Local0)
+ }
+
+ Method (_STA)
+ {
+ Return (0x0F)
+ }
+}
diff --git a/src/ec/quanta/ene_kb3940q/acpi/battery.asl b/src/ec/quanta/ene_kb3940q/acpi/battery.asl
new file mode 100644
index 0000000000..8fbd9bba1b
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/acpi/battery.asl
@@ -0,0 +1,159 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+/*
+ * The mainboard must define strings in the root scope to
+ * report device-specific battery information to the OS.
+ *
+ * BATV: Vendor
+ */
+
+// Scope (EC0)
+
+Device (BATX)
+{
+ Name (_HID, EISAID ("PNP0C0A"))
+ Name (_UID, 1)
+ Name (_PCL, Package () { \_SB })
+
+ Name (PBIF, Package () {
+ 0x00000001, // 0 Power Unit: mAh
+ 0xFFFFFFFF, // 1 Design Capacity
+ 0xFFFFFFFF, // 2 Last Full Charge Capacity
+ 0x00000001, // 3 Battery Technology: Rechargeable
+ 0xFFFFFFFF, // 4 Design Voltage
+ 0x000000FA, // 5 Design Capacity of Warning
+ 0x00000096, // 6 Design Capacity of Low
+ 0x0000000A, // 7 Capacity Granularity 1
+ 0x00000019, // 8 Capacity Granularity 2
+ "", // 9 Model Number
+ "", // 10 Serial Number
+ "", // 11 Battery Type
+ "" // 12 OEM Information
+ })
+
+ Name (PBST, Package () {
+ 0x00000000, // Battery State
+ 0xFFFFFFFF, // Battery Present Rate
+ 0xFFFFFFFF, // Battery Remaining Capacity
+ 0xFFFFFFFF, // Battery Present Voltage
+ })
+
+ // Workaround for full battery status, enabled by default
+ Name (BFWK, One)
+
+ // Method to enable full battery workaround
+ Method (BFWE)
+ {
+ Store (One, BFWK)
+ }
+
+ // Method to disable full battery workaround
+ Method (BFWD)
+ {
+ Store (Zero, BFWK)
+ }
+
+ // Device insertion/removal control method that returns a device’s status.
+ // Power resource object that evaluates to the current on or off state of
+ // the Power Resource.
+ Method (_STA, 0, Serialized)
+ {
+ If (BTIN) {
+ Return (0x1F)
+ } Else {
+ Return (0x0F)
+ }
+ }
+
+ Method (_BIF, 0, Serialized)
+ {
+ // Update fields from EC
+ Store (BDC0, Index (PBIF, 1)) // Batt Design Capacity
+ Store (BFC0, Index (PBIF, 2)) // Batt Last Full Charge Capacity
+ Store (BDV0, Index (PBIF, 4)) // Batt Design Voltage
+ Divide(BFC0, 0x64, Local0, Local1)
+ Multiply(Local1, 0x0A, Local0)
+ Store(Local0, Index(PBIF, 5))
+ Multiply(Local1, 0x05, Local0)
+ Store (Local0, Index (PBIF, 6))
+ Store (ToString(BATD), Index (PBIF, 9)) // Model Number
+ Store (ToDecimalString(BSN0), Index (PBIF, 10)) // Serial Number
+ Store (ToString(BCHM), Index (PBIF, 11)) // Battery Type
+ Store (\BATV, Index (PBIF, 12)) // OEM information
+
+ Return (PBIF)
+ }
+
+ Method (_BST, 0, Serialized)
+ {
+ //
+ // 0: BATTERY STATE
+ //
+ // bit 0 = discharging
+ // bit 1 = charging
+ // bit 2 = critical level
+ //
+
+ // Get battery state from EC
+ Store (BST0, Local0)
+ Store (Local0, Index (PBST, 0))
+
+ //
+ // 1: BATTERY PRESENT RATE/CURRENT
+ //
+ Store (BPC0, Local1)
+ If (LAnd (Local1, 0x8000)) {
+ Xor (Local1, 0xFFFF, Local1)
+ Increment (Local1)
+ }
+ Store (Local1, Index (PBST, 1))
+
+ //
+ // 2: BATTERY REMAINING CAPACITY
+ //
+ Store (BRC0, Local1)
+
+ If (LAnd (BFWK, LAnd (ADPT, LNot (Local0)))) {
+ // On AC power and battery is neither charging
+ // nor discharging. Linux expects a full battery
+ // to report same capacity as last full charge.
+ // https://bugzilla.kernel.org/show_bug.cgi?id=12632
+ Store (BFC0, Local2)
+
+ // See if within ~3% of full
+ ShiftRight (Local2, 5, Local3)
+ If (LAnd (LGreater (Local1, Subtract (Local2, Local3)),
+ LLess (Local1, Add (Local2, Local3))))
+ {
+ Store (Local2, Local1)
+ }
+ }
+ Store (Local1, Index (PBST, 2))
+
+ //
+ // 3: BATTERY PRESENT VOLTAGE
+ //
+ Store (BPV0, Index (PBST, 3))
+
+ Return (PBST)
+ }
+}
diff --git a/src/ec/quanta/ene_kb3940q/acpi/ec.asl b/src/ec/quanta/ene_kb3940q/acpi/ec.asl
new file mode 100644
index 0000000000..4e703feca5
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/acpi/ec.asl
@@ -0,0 +1,280 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * The mainboard must define a PNOT method to handle power
+ * state notifications and Notify CPU device objects to
+ * re-evaluate their _PPC and _CST tables.
+ */
+
+External (\_PR.CPU0._PPC, IntObj)
+
+Device (EC0)
+{
+ Name (_HID, EISAID ("PNP0C09"))
+ Name (_UID, 1)
+ Name (_GPE, Add(EC_SCI_GPI, 16)) // GPE for Runtime SCI
+
+ OperationRegion (ERAM, EmbeddedControl, 0x00, 0xff)
+ Field (ERAM, ByteAcc, Lock, Preserve)
+ {
+ // EC Name Space Configuration
+
+ Offset(0x40),
+ BDC0, 16, // Batt Design Capacity ; 40h, 41h
+ BDV0, 16, // Batt Design Voltage ; 42h, 43h
+ BFC0, 16, // Batt Last Full Charge Capacity ; 44h, 45h
+ BPC0, 16, // Batt Current ; 46h, 47h
+ BRC0, 16, // Batt Remaining Capacity ; 48h, 49h
+ BPV0, 16, // Batt Present Voltage ; 4Ah, 4Bh
+ BCG0, 16, // Batt Charge current ; 4Ch, 4Dh
+ BACV, 16, // Batt Charging Voltage ; 4Eh, 4Fh
+ BTM0, 16, // Batt Battery Temp ; 50h, 51h
+ BSN0, 16, // Batt Serial Number ; 52h, 53h
+ BPCT, 16, // Batt Percentage of full charge ; 54h, 55h
+ BSSB, 16, // BATT Battery Status SMB ; 56h, 57h
+ CYC0, 16, // Batt Cycle Counter ; 58h, 59h
+ BMD0, 16, // Manufacture Date ; 5Ah, 5Bh
+ // Batt Day ; BIT[4:0] (Day)
+ // Batt Month ; BIT[9:5] (Month)
+ // Batt Year ; BIT[15:10] (Year)
+
+
+ Offset(0x60),
+ BCHM, 32, // Battery Chemistry ; 60h - 64h
+ BATD, 56, // Battery Device name ; 64h - 6Ah
+
+ Offset(0x70),
+ ADPT, 1, // AC Adapter Status for OS ; 70h.0
+ ADPN, 1, // AC Adapter H/W status ; 70h.1
+ BTIN, 1, // Battery Present ; 70h.2
+ BTBD, 1, // Battery Malfunction ; 70h.3
+ ACMD, 1, // ACPI Mode ; 70h.4
+ , 1, // Reserved ; 70h.5
+ SSBS, 1, // 1=Standard BIOS, 0=Coreboot ; 70h.6
+ PSTH, 1, // Passive Thermal Policy ; 70h.7
+ BST0, 8, // Battery Status ; 71h
+ // Bit0 : Discharging
+ // Bit1 : Charging
+ // Bit2 : Discharging and Critical Low
+ // Bit3-7 : Reserved
+ LIDF, 1, // Lid is open ; 72h.0
+ GPRC, 1, // Recovery GPI Status ; 72h.1
+ , 6, // Reserved ; 72h.2-7
+ TPLD, 1, // TouchPad LED Activation ; 73h.0
+ TPST, 1, // Touchpad LED Status ; 73h.1
+ , 6, // Reserved ; 73h.2-7
+
+ Offset(0x78),
+ CTMP, 8, // Current CPU Temperature ; 78h
+ SKTB, 8, // GPU Temperature ; 79h
+ LTM1, 8, // Local Temp 1 ; 7Ah
+ LTM2, 8, // Local Temp 2 ; 7Bh
+ FTCH, 16, // Fan Tachometer value ; 7Ch - 7Dh
+ FDBG, 16, // Fan Debug - Override Fan Tach value ; 7Eh - 7Fh
+ , 1, // Reserved ; 80h.0
+ KBID, 1, // 0=EN KBD, 1=JP KBD ; 80h.1
+ , 6, // Reserved ; 80h.2-7
+ NPST, 8, // Number of P-State level ; 81h
+ MPST, 8, // Maxumum P-State ; 82h
+ KWAK, 1, // Keyboard WAKE(0=Disable,1=Enable) ; 83h.0
+ TWAK, 1, // TouchPad WAKE(0=Disable,1=Enable) ; 83h.1
+ , 1, // Reserved ; 83h.2
+ LWAK, 1, // LAN Wake Enable (0=Disable, 1=Enable); 83h.3
+ RWAK, 1, // RTC Wake Enable(0=DIsable,1=Enable) ; 83h.4
+ , 3, // Reserved ; 83h.5-7
+ KBEV, 1, // Keyboard Wake Event ; 84h.0
+ TPEV, 1, // TouchPad Wake Event ; 84h.1
+ LDEV, 1, // Lid Wake Event ; 84h.2
+ , 4, // Reserved ; 84h.3-6
+ PBEV, 1, // Power Button Wake Event ; 84h.7
+
+ ECCD, 8, // EC Code State ; 85h
+ ROFW, 8, // RO FW Reason ID ; 86h
+
+ Offset(0xBA),
+ FWVR, 48, // EC Firmware Version ; BAh-BFh
+
+ Offset(0xC0),
+ SMPR, 8, // SMBus protocol register ; C0h
+ SMST, 8, // SMBus status register ; C1h
+ SMAD, 8, // SMBus address register ; C2h
+ SMCM, 8, // SMBus command register ; C3h
+ SMD0, 0x100, // SMBus data regs (32) ; C4h - E3h
+ BCNT, 8, // SMBus Block Count ; E4h
+ }
+
+ Method (_CRS, 0, NotSerialized)
+ {
+ Name (ECMD, ResourceTemplate()
+ {
+ IO (Decode16, 0x62, 0x62, 0, 1)
+ IO (Decode16, 0x66, 0x66, 0, 1)
+ })
+ Return (ECMD)
+ }
+
+ Method(_STA)
+ {
+ Return(0x0F)
+ }
+
+
+ Method (_REG, 2, NotSerialized)
+ {
+ // Initialize AC power state
+ Store (ADPT, \PWRS)
+
+ // Initialize LID switch state
+ Store (LIDF, \LIDS)
+
+ // Force a read of CPU temperature
+ Store (CTMP, Local0)
+
+ // Find and program number of P-States
+ Store (SizeOf (\_PR.CPU0._PSS), MPST)
+ Store ("Programming number of P-states: ", Debug)
+ Store (MPST, Debug)
+
+ // Find and program the current P-State
+ Store(\_PR.CPU0._PPC, NPST)
+ Store ("Programming Current P-state: ", Debug)
+ Store (NPST, Debug)
+ }
+
+/*
+ * EC Query Responses
+ *
+ * Lid Status Change 06h
+ * Wifi Button Event (F12) 07h
+ * TZ Event Update CPU Temp 08h
+ * CPU P-State Down 0Eh
+ * CPU P-State UP 0Fh
+
+ * AC plug in 10h
+ * AC removed 11h
+ * Battery Plugged in 12h
+ * Battery Removed 13h
+ * Battery State Change 14h
+ */
+
+ // Wifi Button Event
+ Method (_Q07)
+ {
+ Store ("Wifi Button Event 0x07", Debug)
+ }
+
+ // Thermal Event
+ Method (_Q08)
+ {
+ Store ("Thermal Event 0x08", Debug)
+ Notify(\_TZ.THRM, 0x80)
+ }
+
+ // Pstate Down
+ Method (_Q0E)
+ {
+ Store ("Pstate Event 0x0E", Debug)
+
+ Store(\_PR.CPU0._PPC, Local0)
+ Subtract(PPCM, 0x01, Local1)
+
+ If(LLess(Local0, Local1)) {
+ Increment(Local0)
+ \PPCN ()
+ }
+
+ Store(Local0, NPST)
+ }
+
+ // Pstate Up
+ Method (_Q0F)
+ {
+ Store ("Pstate Event 0x0F", Debug)
+ Store(\_PR.CPU0._PPC, Local0)
+
+ If(Local0) {
+ Decrement(Local0)
+ \PPCN ()
+ }
+
+ Store(Local0, NPST)
+ }
+
+ // AC Power Connected
+ Method (_Q10, 0, NotSerialized)
+ {
+ Store ("AC Insertion Event 0x10", Debug)
+ Store (One, \PWRS)
+ Notify (AC, 0x80)
+ Notify (BATX, 0x80)
+ \PNOT ()
+ }
+
+ // AC Power Removed
+ Method (_Q11, 0, NotSerialized)
+ {
+ Store ("AC Detach Event 0x11", Debug)
+ Store (Zero, \PWRS)
+ Notify (AC, 0x80)
+ Notify (BATX, 0x80)
+ \PNOT ()
+ }
+
+ // Battery State Change - Attach Event
+ Method (_Q12, 0, NotSerialized)
+ {
+ Store ("Battery Insertion Event 0x12", Debug)
+
+ Notify (BATX, 0x81)
+ Notify (BATX, 0x80)
+ \PNOT ()
+ }
+
+ // Battery State Change - Detach Event
+ Method (_Q13, 0, NotSerialized)
+ {
+ Store ("Battery Detach Event 0x13", Debug)
+
+ Notify (BATX, 0x81)
+ Notify (BATX, 0x80)
+ \PNOT ()
+ }
+
+
+ // Battery State Change Event
+ Method (_Q14, 0, NotSerialized)
+ {
+ Store ("Battery State Change Event 0x14", Debug)
+
+ Notify (BATX, 0x80)
+ }
+
+ // Lid Switch Event
+ Method (_Q06)
+ {
+ Store ("Lid Switch Event 0x06", Debug)
+ sleep(20)
+ Store (LIDF, \LIDS)
+ Notify (\_SB.LID0, 0x80)
+ }
+
+ #include "ac.asl"
+ #include "battery.asl"
+}
diff --git a/src/ec/quanta/ene_kb3940q/acpi/superio.asl b/src/ec/quanta/ene_kb3940q/acpi/superio.asl
new file mode 100644
index 0000000000..db4b4128f1
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/acpi/superio.asl
@@ -0,0 +1,57 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+// Scope is \_SB.PCI0.LPCB
+
+Device (SIO) {
+ Name (_UID, 0)
+ Name (_ADR, 0)
+
+
+#ifdef SIO_EC_ENABLE_PS2K
+ Device (PS2K) // Keyboard
+ {
+ Name (_UID, 0)
+ Name (_ADR, 0)
+ Name (_HID, EISAID("PNP0303"))
+ Name (_CID, EISAID("PNP030B"))
+
+ Method (_STA, 0, NotSerialized) {
+ Return (0x0F)
+ }
+
+ Name (_CRS, ResourceTemplate()
+ {
+ FixedIO (0x60, 0x01)
+ FixedIO (0x64, 0x01)
+ IRQNoFlags () {1}
+ })
+
+ Name (_PRS, ResourceTemplate()
+ {
+ StartDependentFn (0, 0) {
+ FixedIO (0x60, 0x01)
+ FixedIO (0x64, 0x01)
+ IRQNoFlags () {1}
+ }
+ EndDependentFn ()
+ })
+ }
+#endif
+}
diff --git a/src/ec/quanta/ene_kb3940q/chip.h b/src/ec/quanta/ene_kb3940q/chip.h
new file mode 100644
index 0000000000..ce95c1c27e
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/chip.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _EC_QUANTA_ENE_KB3940Q_CHIP_H
+#define _EC_QUANTA_ENE_KB3940Q_CHIP_H
+
+#include <device/device.h>
+#include <pc80/keyboard.h>
+
+struct chip_operations;
+extern struct chip_operations ec_quanta_ene_kb3940q_ops;
+
+struct ec_quanta_ene_kb3940q_config {
+ struct pc_keyboard keyboard;
+};
+
+#endif /* _EC_QUANTA_ENE_KB3940Q_CHIP_H */
diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c
new file mode 100644
index 0000000000..1ef971244f
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/ec.c
@@ -0,0 +1,188 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __PRE_RAM__
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <stdlib.h>
+#include <arch/io.h>
+#include <delay.h>
+#include <elog.h>
+#include "ec.h"
+#include "chip.h"
+
+/* kbc helper functions from drivers/pc80/keyboard.c */
+static int ec_input_buffer_empty(u8 status_port)
+{
+ u32 timeout;
+ for(timeout = KBC_TIMEOUT_IN_MS; timeout && (inb(status_port) & KBD_IBF);
+ timeout--) {
+ mdelay(1);
+ }
+
+ if (!timeout) {
+ printk(BIOS_WARNING, "Unexpected EC/KBD input buffer full\n");
+ }
+ return !!timeout;
+}
+
+
+static int ec_output_buffer_full(u8 status_port)
+{
+ u32 timeout;
+ for(timeout = KBC_TIMEOUT_IN_MS; timeout && ((inb(status_port)
+ & KBD_OBF) == 0); timeout--) {
+ mdelay(1);
+ }
+
+ if (!timeout) {
+ printk(BIOS_INFO, "EC/KBD output buffer result timeout\n");
+ }
+ return !!timeout;
+}
+
+
+
+/* The ENE 60/64 EC registers are the same command/status IB/OB KBC pair.
+ * Check status from 64 port before each command.
+ *
+ * Ex. Get panel ID command C43/D77
+ * Check IBF empty. Then Write 0x43(CMD) to 0x64 Port
+ * Check IBF empty. Then Write 0x77(DATA) to 0x60 Port
+ * Check OBF set. Then Get Data(0x03:panel ID) from 0x60
+ * Different commands return may or may not respond and may have multiple
+ * bytes. Keep it simple for now
+ */
+
+u8 ec_kbc_read_ob(void)
+{
+ if (!ec_output_buffer_full(KBD_STATUS)) return 0;
+ return inb(KBD_DATA);
+}
+
+void ec_kbc_write_cmd(u8 cmd)
+{
+ if (!ec_input_buffer_empty(KBD_STATUS)) return;
+ outb(cmd, KBD_COMMAND);
+}
+
+void ec_kbc_write_ib(u8 data)
+{
+ if (!ec_input_buffer_empty(KBD_STATUS)) return;
+ outb(data, KBD_DATA);
+}
+
+/* EC Host Control Protocol routines */
+u8 ec_read_ob(void)
+{
+ if (!ec_output_buffer_full(EC_SC)) return 0;
+ return inb(EC_DATA);
+}
+
+void ec_write_cmd(u8 cmd)
+{
+ if (!ec_input_buffer_empty(EC_SC)) return;
+ outb(cmd, EC_COMMAND);
+}
+
+void ec_write_ib(u8 data)
+{
+ if (!ec_input_buffer_empty(EC_SC)) return;
+ outb(data, EC_DATA);
+}
+
+/*
+ * These functions are for accessing the ENE932 device RAM space
+ */
+u8 ec_mem_read(u8 addr)
+{
+ ec_write_cmd(EC_CMD_READ_RAM);
+ ec_write_ib(addr);
+ return ec_read_ob();
+}
+
+void ec_mem_write(u8 addr, u8 data)
+{
+ ec_write_cmd(EC_CMD_WRITE_RAM);
+ ec_write_ib(addr);
+ ec_write_ib(data);
+ return;
+}
+
+#ifndef __SMM__
+static void ene_kb3940q_log_events(void)
+{
+#if CONFIG_ELOG
+ u8 reason = ec_mem_read(EC_SHUTDOWN_REASON);
+ if (reason)
+ elog_add_event_byte(ELOG_TYPE_EC_SHUTDOWN, reason);
+#endif
+}
+
+static void ene_kb3940q_init(device_t dev)
+{
+ struct ec_quanta_ene_kb3940q_config *conf = dev->chip_info;
+
+ if (!dev->enabled)
+ return;
+
+ printk(BIOS_DEBUG, "Quanta EnE KB3940Q: Initializing keyboard.\n");
+ pc_keyboard_init(&conf->keyboard);
+
+ ene_kb3940q_log_events();
+}
+
+
+static void ene_kb3940q_read_resources(device_t dev)
+{
+ /* This function avoids an error on serial console. */
+}
+
+
+static void ene_kb3940q_enable_resources(device_t dev)
+{
+ /* This function avoids an error on serial console. */
+}
+
+static struct device_operations ops = {
+ .init = ene_kb3940q_init,
+ .read_resources = ene_kb3940q_read_resources,
+ .enable_resources = ene_kb3940q_enable_resources
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, 0, 0, { 0, 0 }, }
+};
+
+static void enable_dev(device_t dev)
+{
+ pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
+ pnp_dev_info);
+}
+
+struct chip_operations ec_quanta_ene_kb3940q_ops = {
+ CHIP_NAME("QUANTA EnE KB3940Q EC")
+ .enable_dev = enable_dev
+};
+#endif /* ! __SMM__ */
+#endif /* ! __PRE_RAM__ */
diff --git a/src/ec/quanta/ene_kb3940q/ec.h b/src/ec/quanta/ene_kb3940q/ec.h
new file mode 100644
index 0000000000..ab01b2914c
--- /dev/null
+++ b/src/ec/quanta/ene_kb3940q/ec.h
@@ -0,0 +1,213 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * EC communication interface for QUANTA EnE KB3940Q Embedded Controller.
+ */
+
+#ifndef _EC_QUANTA_ENE_KB3940Q_EC_H
+#define _EC_QUANTA_ENE_KB3940Q_EC_H
+
+#define EC_IO 0x380 /* Mainboard specific. Could be Kconfig option */
+#define EC_IO_HIGH EC_IO + 1
+#define EC_IO_LOW EC_IO + 2
+#define EC_IO_DATA EC_IO + 3
+
+
+
+// 60h/64h Command Interface
+#define KBD_DATA 0x60
+#define KBD_COMMAND 0x64
+#define KBD_STATUS 0x64
+#define KBD_IBF (1 << 1) // 1: input buffer full (data ready for ec)
+#define KBD_OBF (1 << 0) // 1: output buffer full (data ready for host)
+
+// 62h/66h Command Interface
+#define EC_DATA 0x62
+#define EC_COMMAND 0x66
+#define EC_SC 0x66
+
+/* Wait 400ms for keyboard controller answers */
+#define KBC_TIMEOUT_IN_MS 400
+
+u8 ec_kbc_read_ob(void);
+void ec_kbc_write_cmd(u8 cmd);
+void ec_kbc_write_ib(u8 data);
+u8 ec_read_ob(void);
+void ec_write_cmd(u8 cmd);
+void ec_write_ib(u8 data);
+
+u8 ec_mem_read(u8 addr);
+void ec_mem_write(u8 addr, u8 data);
+
+/*****************************************************************************
+ * EC Internal memory
+ */
+
+#define EC_BAT_DCAP_LO 0x40
+#define EC_BAT_DCAP_HI 0x41
+#define EC_BAT_DVOLT_LO 0x42
+#define EC_BAT_DVOLT_HI 0x43
+#define EC_BAT_FULL_CAP_LO 0x44
+#define EC_BAT_FULL_CAP_HI 0x45
+#define EC_BAT_RATE_LO 0x46
+#define EC_BAT_RATE_HI 0x47
+#define EC_BAT_RMC_LO 0x48
+#define EC_BAT_RMC_HI 0x49
+#define EC_BAT_VOLT_LO 0x4A
+#define EC_BAT_VOLT_HI 0x4B
+#define EC_BAT_CHRG_CURT_LO 0x4C
+#define EC_BAT_CHRG_CURT_HI 0x4D
+#define EC_BAT_CHRG_VOLT_LO 0x4E
+#define EC_BAT_CHRG_VOLT_HI 0x4F
+#define EC_BAT_TEMP_LO 0x50
+#define EC_BAT_TEMP_HI 0x51
+#define EC_BAT_SN_LO 0x52
+#define EC_BAT_SN_HI 0x53
+#define EC_BAT_RSOC_LO 0x54
+#define EC_BAT_RSOC_HI 0x55
+#define EC_BAT_STATUS_LO 0x56
+#define EC_BAT_STATUS_HI 0x57
+#define EC_BAT_CYCLE_COUNT_LO 0x58
+#define EC_BAT_CYCLE_COUNT_HI 0x59
+#define EC_BAT_MFG_DATE_LO 0x5A
+#define EC_BAT_MFG_DATE_HI 0x5B
+#define EC_BAT_CHEMISTRY0 0x60
+#define EC_BAT_CHEMISTRY1 0x61
+#define EC_BAT_CHEMISTRY2 0x62
+#define EC_BAT_CHEMISTRY3 0x63
+#define EC_BAT_DEVICE_NAME0 0x64
+#define EC_BAT_DEVICE_NAME1 0x65
+#define EC_BAT_DEVICE_NAME2 0x66
+#define EC_BAT_DEVICE_NAME3 0x67
+#define EC_BAT_DEVICE_NAME4 0x68
+#define EC_BAT_DEVICE_NAME5 0x69
+#define EC_BAT_DEVICE_NAME6 0x6A
+
+#define EC_POWER_FLAG 0x70
+#define EC_PF_ADAPTER_IN (1 << 0)
+#define EC_PF_ADAPTER_PIN (1 << 1)
+#define EC_PF_BATT_IN (1 << 2)
+#define EC_PF_BATT_DESTROY (1 << 3)
+#define EC_PF_ACPI_MODE (1 << 4)
+#define EC_PF_X86_BIOS (1 << 6)
+#define EC_PF_COREBOOT 0
+#define EC_PF_PASSIVE_THERM (1 << 7)
+
+#define EC_CHARGER_STATUS 0x71
+#define EC_CHS_BAT_DISCHARGING (1 << 0)
+#define EC_CHS_BAT_CHARGING (1 << 1)
+#define EC_CHS_BAT_CRITICAL (1 << 2)
+
+#define EC_HW_GPI_STATUS 0x72
+#define EC_GPI_LID_STAT_BIT 0
+#define EC_GPI_RECOVERY_MODE_BIT 1
+#define EC_GPI_LID_OPEN (1 << EC_GPI_LID_STAT_BIT)
+#define EC_GPI_RECOVERY_STATUS (1 << EC_GPI_RECOVERY_MODE_BIT)
+
+#define EC_GPIO_STATUS 0x73
+#define EC_GPIO_TP_LED_ENABLE (1 << 0)
+#define EC_GPIO_TP_LED_STATUS (1 << 1)
+
+#define EC_CPU_TMP 0x78
+#define EC_GPU_TMP 0x79
+#define EC_LOCAL_TMP1 0x7A
+#define EC_LOCAL_TMP2 0x7B
+#define EC_FAN_TACH_LO 0x7C
+#define EC_FAN_TACH_HI 0x7D
+#define EC_FAN_DBG_RPM_LO 0x7E
+#define EC_FAN_DBG_RPM_HI 0x7F
+
+#define EC_KBID_REG 0x80
+#define EC_KBD_EN 0
+#define EC_KBD_JP (1 << 1)
+#define EC_CURR_PS 0x81
+#define EC_MAX_PS 0x82
+
+#define EC_EC_PSW 0x83
+#define EC_PSW_IKB (1 << 0)
+#define EC_PSW_TP (1 << 1)
+#define EC_PSW_LAN (1 << 3)
+#define EC_PSW_RTC (1 << 4)
+#define EC_PSW_USB (1 << 5)
+
+#define EC_WAKE_EVEN_TID 0x84
+#define EC_WID_IKB (1 << 0)
+#define EC_WID_TP (1 << 1)
+#define EC_WID_LID (1 << 2)
+#define EC_WID_PWRSW (1 << 7)
+
+#define EC_CODE_STATE 0x85
+#define EC_COS_INITIAL_STAGE 0xBB
+#define EC_COS_EC_RO 0xC0
+#define EC_COS_EC_RW 0xC1
+
+#define EC_FW_REASON_ID 0x86
+#define EC_FWR_NOT_RO 0x00
+#define EC_FWR_GPI_ASSERTED 0x01
+#define EC_FWR_HOTKEY_PRESSED 0x02
+#define EC_FWR_FIRMWARE_CORRUPT 0x03
+
+#define EC_SHUTDOWN_REASON 0xB9
+#define EC_FW_VER0 0xBA
+#define EC_FW_VER1 0xBB
+#define EC_FW_VER2 0xBC
+#define EC_FW_VER3 0xBD
+#define EC_FW_VER4 0xBE
+#define EC_FW_VER5 0xBF
+#define EC_SMBPTCL 0xC0
+#define EC_SMBSTA 0xC1
+#define EC_SMBADDR 0xC2
+#define EC_SMBCMD 0xC3
+#define EC_SMBDATA 0xC4
+#define EC_SMBBCNT 0xE4
+
+/*****************************************************************************
+ * SMI / SCI event status
+ */
+#define Q_EVENT_LID_STATUS 0x06
+#define Q_EVENT_WIFI_BUTTON 0x06
+#define Q_EVENT_THERM_EVENT 0x08
+#define Q_EVENT_PSTATE_DOWN 0x0E
+#define Q_EVENT_PSTATE_UP 0x0F
+#define Q_EVENT_AC_PLUGGED 0x10
+#define Q_EVENT_AC_UNPLUGGED 0x11
+#define Q_EVENT_BATTERY_PLUGGED 0x12
+#define Q_EVENT_BATTERY_UNPLUGGED 0x13
+#define Q_EVENT_BATTERY_STATUS 0x14
+
+/*****************************************************************************
+ * EC Commands
+ */
+#define EC_CMD_ENABLE_ACPI_MODE 0x71
+#define EC_CMD_DISABLE_ACPI_MODE 0x72
+#define EC_CMD_DISABLE_SMBUS_EVENT 0x73
+#define EC_CMD_ENABLE_SMBUS_EVENT 0x74
+#define EC_CMD_SYSTEM_RESET 0x78
+#define EC_CMD_SYSTEM_SHUTDOWN 0x79
+#define EC_CMD_RESET_FOR_FW_UPDATE 0x7D
+#define EC_CMD_IDLE_FOR SPI_UPDATE 0x7E
+#define EC_CMD_READ_RAM 0x80
+#define EC_CMD_WRITE_RAM 0x81
+#define EC_CMD_BURST_ENABLE 0x82
+#define EC_CMD_BURST_DISABLE 0x83
+#define EC_CMD_QUERY_EVENT 0x84
+
+
+#endif /* _EC_QUANTA_ENE_KB3940Q_EC_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 16:02:56 +0000