diff options
Diffstat (limited to 'src/include/device')
-rw-r--r-- | src/include/device/chip.h | 23 | ||||
-rw-r--r-- | src/include/device/device.h | 16 | ||||
-rw-r--r-- | src/include/device/hypertransport.h | 2 | ||||
-rw-r--r-- | src/include/device/hypertransport_def.h | 16 | ||||
-rw-r--r-- | src/include/device/pci_def.h | 4 | ||||
-rw-r--r-- | src/include/device/pnp.h | 97 | ||||
-rw-r--r-- | src/include/device/pnp_def.h | 12 | ||||
-rw-r--r-- | src/include/device/resource.h | 6 |
8 files changed, 91 insertions, 85 deletions
diff --git a/src/include/device/chip.h b/src/include/device/chip.h index dc078a96b7..7dface868f 100644 --- a/src/include/device/chip.h +++ b/src/include/device/chip.h @@ -1,6 +1,8 @@ #ifndef DEVICE_CHIP_H +#define DEVICE_CHIP_H #include <device/path.h> +#include <device/device.h> /* chips are arbitrary chips (superio, southbridge, etc.) * They have private structures that define chip resources and default @@ -16,21 +18,6 @@ #define CONFIGURE(pass) #endif -struct com_ports { - unsigned int enable,baud, base, irq; -}; - -/* lpt port description. - * Note that for many chips you only really need to define the - * enable. - */ -struct lpt_ports { - unsigned int enable, // 1 if this port is enabled - mode, // pp mode - base, // IO base of the parallel port - irq; // irq -}; - enum chip_pass { CONF_PASS_PRE_CONSOLE, CONF_PASS_PRE_PCI, @@ -60,11 +47,17 @@ struct chip_control { void (*enable_dev)(struct device *dev); }; +struct chip_resource { + unsigned long flags; + unsigned long index; + unsigned long base; +}; struct chip_device_path { struct device_path path; unsigned channel; int enable; + struct chip_resource resource[MAX_RESOURCES]; }; struct device; diff --git a/src/include/device/device.h b/src/include/device/device.h index 1b2b0169dc..20d9c22298 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -28,7 +28,7 @@ struct bus { unsigned char cap; /* PCi capability offset */ }; -#define MAX_RESOURCES 6 +#define MAX_RESOURCES 8 #define MAX_LINKS 3 /* * There is one device structure for each slot-number/function-number @@ -49,18 +49,6 @@ struct device { unsigned int enable : 1; /* set if we should enable the device */ uint8_t command; - /* - * In theory, the irq level can be read from configuration - * space and all would be fine. However, old PCI chips don't - * support these registers and return 0 instead. For example, - * the Vision864-P rev 0 chip can uses INTA, but returns 0 in - * the interrupt line and pin registers. pci_init() - * initializes this field with the value at PCI_INTERRUPT_LINE - * and it is the job of pcibios_fixup() to change it if - * necessary. The field must not be 0 unless the device - * cannot generate interrupts at all. - */ - unsigned int irq; /* irq generated by this device */ /* Base registers for this device, can be adjusted by * pcibios_fixup() as necessary. @@ -94,6 +82,8 @@ extern void assign_resources(struct bus *bus); extern void enable_resources(struct device *dev); extern void enumerate_static_device(void); extern const char *dev_path(device_t dev); +extern void compact_resources(device_t dev); +extern struct resource *get_resource(device_t dev, unsigned index); /* Helper functions */ device_t alloc_find_dev(struct bus *parent, struct device_path *path); diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index e342aeb506..410495cdcb 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -1,6 +1,8 @@ #ifndef DEVICE_HYPERTRANSPORT_H #define DEVICE_HYPERTRANSPORT_H +#include <device/hypertransport_def.h> + unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max); #define HT_IO_HOST_ALIGN 4096 diff --git a/src/include/device/hypertransport_def.h b/src/include/device/hypertransport_def.h new file mode 100644 index 0000000000..0b44109f9f --- /dev/null +++ b/src/include/device/hypertransport_def.h @@ -0,0 +1,16 @@ +#ifndef DEVICE_HYPERTRANSPORT_DEF_H +#define DEVICE_HYPERTRANSPORT_DEF_H + +#define HT_FREQ_200Mhz 0 +#define HT_FREQ_300Mhz 1 +#define HT_FREQ_400Mhz 2 +#define HT_FREQ_500Mhz 3 +#define HT_FREQ_600Mhz 4 +#define HT_FREQ_800Mhz 5 +#define HT_FREQ_1000Mhz 6 +#define HT_FREQ_1200Mhz 7 +#define HT_FREQ_1400Mhz 8 +#define HT_FREQ_1600Mhz 9 +#define HT_FREQ_VENDOR 15 /* AMD defines this to be 100Mhz */ + +#endif /* DEVICE_HYPERTRANSPORT_DEF_H */ diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index ad8f1e6b88..46229a12f4 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -179,7 +179,9 @@ #define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ #define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */ #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ -#define PCI_CAP_ID_HT 0x08 +#define PCI_CAP_ID_PCIX 0x07 /* PCIX */ +#define PCI_CAP_ID_HT 0x08 /* Hypertransport */ +#define PCI_CAP_ID_PCIE 0x10 /* PCI Express */ #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index 0d39fc1663..508fac68ed 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -1,58 +1,49 @@ #ifndef DEVICE_PNP_H #define DEVICE_PNP_H -static inline void pnp_write_config(unsigned char port, unsigned char value, unsigned char reg) -{ - outb(reg, port); - outb(value, port +1); -} - -static inline unsigned char pnp_read_config(unsigned char port, unsigned char reg) -{ - outb(reg, port); - return inb(port +1); -} - -static inline void pnp_set_logical_device(unsigned char port, int device) -{ - pnp_write_config(port, device, 0x07); -} - -static inline void pnp_set_enable(unsigned char port, int enable) -{ - pnp_write_config(port, enable?0x1:0x0, 0x30); -} - -static inline int pnp_read_enable(unsigned char port) -{ - return !!pnp_read_config(port, 0x30); -} - -static inline void pnp_set_iobase0(unsigned char port, unsigned iobase) -{ - pnp_write_config(port, (iobase >> 8) & 0xff, 0x60); - pnp_write_config(port, iobase & 0xff, 0x61); -} - -static inline void pnp_set_iobase1(unsigned char port, unsigned iobase) -{ - pnp_write_config(port, (iobase >> 8) & 0xff, 0x62); - pnp_write_config(port, iobase & 0xff, 0x63); -} - -static inline void pnp_set_irq0(unsigned char port, unsigned irq) -{ - pnp_write_config(port, irq, 0x70); -} - -static inline void pnp_set_irq1(unsigned char port, unsigned irq) -{ - pnp_write_config(port, irq, 0x72); -} - -static inline void pnp_set_drq(unsigned char port, unsigned drq) -{ - pnp_write_config(port, drq & 0xff, 0x74); -} +#include <stdint.h> +#include <device/device.h> +#include <device/pnp_def.h> +#include <device/chip.h> + +/* Primitive pnp resource manipulation */ +void pnp_write_config(device_t dev, uint8_t reg, uint8_t value); +uint8_t pnp_read_config(device_t dev, uint8_t reg); +void pnp_set_logical_device(device_t dev); +void pnp_set_enable(device_t dev, int enable); +int pnp_read_enable(device_t dev); +void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase); +void pnp_set_irq(device_t dev, unsigned index, unsigned irq); +void pnp_set_drq(device_t dev, unsigned index, unsigned drq); + +/* PNP device operations */ +void pnp_read_resources(device_t dev); +void pnp_set_resources(device_t dev); +void pnp_enable_resources(device_t dev); +void pnp_enable(device_t dev); + +struct device_operations pnp_ops; + +/* PNP helper operations */ + +struct io_info { + unsigned mask, set; +}; + +struct pnp_info { + struct device_operations *ops; + unsigned function; + unsigned flags; +#define PNP_IO0 0x01 +#define PNP_IO1 0x02 +#define PNP_IRQ0 0x04 +#define PNP_IRQ1 0x08 +#define PNP_DRQ0 0x10 +#define PNP_DRQ1 0x20 + struct io_info io0, io1; +}; +struct resource *pnp_get_resource(device_t dev, unsigned index); +void pnp_enumerate(struct chip *chip, unsigned functions, + struct device_operations *ops, struct pnp_info *info); #endif /* DEVICE_PNP_H */ diff --git a/src/include/device/pnp_def.h b/src/include/device/pnp_def.h new file mode 100644 index 0000000000..b077837d02 --- /dev/null +++ b/src/include/device/pnp_def.h @@ -0,0 +1,12 @@ +#ifndef DEVICE_PNP_DEF_H +#define DEVICE_PNP_DEF_H + +#define PNP_IDX_IO0 0x60 +#define PNP_IDX_IO1 0x62 +#define PNP_IDX_IRQ0 0x70 +#define PNP_IDX_IRQ1 0x72 +#define PNP_IDX_DRQ0 0x74 +#define PNP_IDX_DRQ1 0x75 + + +#endif /* DEVICE_PNP_DEF_H */ diff --git a/src/include/device/resource.h b/src/include/device/resource.h index f90aba19f4..73a3f6e0d5 100644 --- a/src/include/device/resource.h +++ b/src/include/device/resource.h @@ -18,9 +18,9 @@ #define IORESOURCE_SUBTRACTIVE 0x00040000 /* This resource filters all of the unclaimed transactions * to the bus below. */ - -#define IORESOURCE_SET 0x80000000 /* An IO resource that has been assigned a value */ -#define IORESOURCE_FIXED 0x40000000 /* An IO resource the allocator must not change */ +#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */ +#define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */ +#define IORESOURCE_FIXED 0x80000000 /* An IO resource the allocator must not change */ /* PCI specific resource bits */ #define IORESOURCE_PCI64 (1<<0) /* 64bit long pci resource */ |