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-rw-r--r--src/include/rules.h25
1 files changed, 17 insertions, 8 deletions
diff --git a/src/include/rules.h b/src/include/rules.h
index 10cd715db1..ed147224b9 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -266,6 +266,23 @@
#define ENV_PAYLOAD_LOADER ENV_RAMSTAGE
#endif
+#if CONFIG(ARCH_X86)
+/* Indicates memory layout is determined by arch/x86/car.ld. */
+#define ENV_CACHE_AS_RAM (ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_VERSTAGE)
+/* No .data sections with execute-in-place from ROM. */
+#define ENV_STAGE_HAS_DATA_SECTION !ENV_CACHE_AS_RAM
+/* No .bss sections with execute-in-place from ROM. */
+#define ENV_STAGE_HAS_BSS_SECTION !ENV_CACHE_AS_RAM
+#else
+/* Both .data and .bss, sometimes SRAM not DRAM. */
+#define ENV_STAGE_HAS_DATA_SECTION 1
+#define ENV_STAGE_HAS_BSS_SECTION 1
+#define ENV_CACHE_AS_RAM 0
+#endif
+
+/* Currently rmodules, ramstage and smm have heap. */
+#define ENV_STAGE_HAS_HEAP_SECTION (ENV_RMODULE || ENV_RAMSTAGE || ENV_SMM)
+
/**
* For pre-DRAM stages and post-CAR always build with simple device model, ie.
* PCI, PNP and CPU functions operate without use of devicetree. The reason
@@ -281,12 +298,4 @@
#define __SIMPLE_DEVICE__
#endif
-/* x86 specific. Indicates that the current stage is running with cache-as-ram
- * enabled from the beginning of the stage in C code. */
-#if defined(__PRE_RAM__)
-#define ENV_CACHE_AS_RAM CONFIG(ARCH_X86)
-#else
-#define ENV_CACHE_AS_RAM 0
-#endif
-
#endif /* _RULES_H */