diff options
Diffstat (limited to 'src/include')
27 files changed, 79 insertions, 79 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index cec394e474..19d2881f43 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -33,7 +33,7 @@ /* Since coreboot is usually compiled 32bit, gcc will align 64bit * types to 32bit boundaries. If the coreboot table is dumped on a - * 64bit system, a uint64_t would be aligned to 64bit boundaries, + * 64bit system, a uint64_t would be aligned to 64bit boundaries, * breaking the table format. * * lb_uint64 will keep 64bit coreboot table values aligned to 32bit @@ -216,7 +216,7 @@ struct cmos_entries { uint32_t config; /* e=enumeration, h=hex, r=reserved */ uint32_t config_id; /* a number linking to an enumeration record */ #define CMOS_MAX_NAME_LENGTH 32 - uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, + uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, variable length int aligned */ }; @@ -232,7 +232,7 @@ struct cmos_enums { uint32_t config_id; /* a number identifying the config id */ uint32_t value; /* the value associated with the text */ #define CMOS_MAX_TEXT_LENGTH 32 - uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, + uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, variable length int aligned */ }; diff --git a/src/include/boot/elf_boot.h b/src/include/boot/elf_boot.h index ee6750d293..b119babc00 100644 --- a/src/include/boot/elf_boot.h +++ b/src/include/boot/elf_boot.h @@ -1,5 +1,5 @@ -#ifndef ELF_BOOT_H -#define ELF_BOOT_H +#ifndef ELF_BOOT_H +#define ELF_BOOT_H #include <stdint.h> @@ -32,7 +32,7 @@ typedef struct Elf_Half b_records; } Elf_Bhdr; -typedef struct +typedef struct { Elf_Word n_namesz; /* Length of the note's name. */ Elf_Word n_descsz; /* Length of the note's descriptor. */ diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 6eb706284c..c17d13f64f 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -84,7 +84,7 @@ struct cbfs_header { u32 magic; - u32 version; + u32 version; u32 romsize; u32 bootblocksize; u32 align; diff --git a/src/include/console/btext.h b/src/include/console/btext.h index 88d93931b9..1d2e37e1fc 100644 --- a/src/include/console/btext.h +++ b/src/include/console/btext.h @@ -3,7 +3,7 @@ * (for MacOS) when it is used to boot Linux. * * Written by Benjamin Herrenschmidt. - * + * * Move to coreboot by LYH yhlu@tyan.com * */ diff --git a/src/include/console/console.h b/src/include/console/console.h index be91988291..36661c25c7 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -30,7 +30,7 @@ extern struct console_driver econsole_drivers[]; extern int console_loglevel; #else /* __PRE_RAM__ */ -/* Using a global varible can cause problems when we reset the stack +/* Using a global varible can cause problems when we reset the stack * from cache as ram to ram. If we make this a define USE_SHARED_STACK * we could use the same code on all architectures. */ diff --git a/src/include/console/vtxprintf.h b/src/include/console/vtxprintf.h index f7d58bbd6a..2cf44de7ea 100644 --- a/src/include/console/vtxprintf.h +++ b/src/include/console/vtxprintf.h @@ -1,6 +1,6 @@ /* * This file is part of the coreboot project. - * + * * Copyright (C) 2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h index 28158a6c38..3ae35fd17d 100644 --- a/src/include/cpu/amd/amdk8_sysconf.h +++ b/src/include/cpu/amd/amdk8_sysconf.h @@ -20,7 +20,7 @@ struct amdk8_sysconf_t { int apicid_offset; void *mb; // pointer for mb releated struct - + }; extern struct amdk8_sysconf_t sysconf; diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index ec99b95395..681b90cca0 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -284,20 +284,20 @@ #define SMM_INST_EN_SET (1<<3) #define INTL_SMI_EN_SET (1<<4) #define EXTL_SMI_EN_SET (1<<5) - + #define CPU_FPU_MSR_MODE 0x1A00 #define FPU_IE_SET (1<<0) - + #define CPU_FP_UROM_BIST 0x1A03 - + #define CPU_BC_CONF_0 0x1900 #define TSC_SUSP_SET (1<<5) #define SUSP_EN_SET (1<<12) - + /**/ /* VG GLIU0 port4*/ /**/ - + #define VG_GLD_MSR_CAP (MSR_VG + 0x2000) #define VG_GLD_MSR_CONFIG (MSR_VG + 0x2001) #define VG_GLD_MSR_PM (MSR_VG + 0x2004) @@ -332,7 +332,7 @@ #define RSTPLL_UPPER_MDIV_SHIFT 9 #define RSTPLL_UPPER_VDIV_SHIFT 6 #define RSTPLL_UPPER_FBDIV_SHIFT 0 - + #define RSTPLL_LOWER_SWFLAGS_SHIFT 26 #define RSTPLL_LOWER_SWFLAGS_MASK (0x3F<<RSTPLL_LOWER_SWFLAGS_SHIFT) diff --git a/src/include/cpu/amd/lxdef.h b/src/include/cpu/amd/lxdef.h index 161092248c..d312c0e6da 100644 --- a/src/include/cpu/amd/lxdef.h +++ b/src/include/cpu/amd/lxdef.h @@ -285,11 +285,11 @@ #define CPU_L2TB_ENTRY 0x189E #define CPU_L2TB_ENTRY_I 0x189F #define CPU_DM_BIST 0x18C0 - + #define CPU_BC_CONF_0 0x1900 #define TSC_SUSP_SET (1<<5) #define SUSP_EN_SET (1<<12) - + #define CPU_BC_CONF_1 0x1901 #define CPU_BC_MSR_LOCK 0x1908 #define CPU_BC_L2_CONF 0x1920 @@ -342,11 +342,11 @@ #define CPU_CPUID12 0x3012 #define CPU_CPUID13 0x3013 - + /* VG GLIU0 port4*/ - + #define VG_GLD_MSR_CAP (MSR_VG + 0x2000) #define VG_GLD_MSR_CONFIG (MSR_VG + 0x2001) diff --git a/src/include/cpu/amd/sc520.h b/src/include/cpu/amd/sc520.h index b0fa5680b7..c79e99efac 100644 --- a/src/include/cpu/amd/sc520.h +++ b/src/include/cpu/amd/sc520.h @@ -2,8 +2,8 @@ /* default location of the MMCR */ #define MMCR 0xfffef000 -/* the PAR register struct definition, the location in memory, - * and a handy pointer for you to use +/* the PAR register struct definition, the location in memory, + * and a handy pointer for you to use */ struct parreg { @@ -25,7 +25,7 @@ struct parreg { /* here is the real mmcr struct */ struct memregs { - /* make these shorts, we are lsb and the hardware seems to like it + /* make these shorts, we are lsb and the hardware seems to like it * better */ unsigned short drcctl; @@ -46,7 +46,7 @@ struct dbctl { unsigned char dbctl; unsigned char pad4[15]; }; - + struct romregs { unsigned char bootcs; unsigned char pad5[3]; @@ -55,7 +55,7 @@ struct romregs { unsigned char romcs2; unsigned char pad7[6]; }; - + struct hostbridge { unsigned short ctl; @@ -169,7 +169,7 @@ struct ssi { unsigned char pad[0x2b]; }; - + /* interrupt control registers */ /* defined this way for portability. Shame we can't just use plan 9 c. */ struct pic { @@ -225,7 +225,7 @@ struct pic { unsigned char gp9imap; unsigned char gp10imap; unsigned char padend[0x14]; -}; +}; struct reset { unsigned char sysinfo; @@ -282,7 +282,7 @@ struct dmacontrol { }; - + struct mmcr { unsigned short revid; diff --git a/src/include/cpu/amd/vr.h b/src/include/cpu/amd/vr.h index e98ac86409..805b977cd7 100644 --- a/src/include/cpu/amd/vr.h +++ b/src/include/cpu/amd/vr.h @@ -7,7 +7,7 @@ #ifndef CPU_AMD_VR_H #define CPU_AMD_VR_H -#define VRC_INDEX 0xAC1C // Index register +#define VRC_INDEX 0xAC1C // Index register #define VRC_DATA 0xAC1E // Data register #define VR_UNLOCK 0xFC53 // Virtual register unlock code #define NO_VR -1 // No virtual registers @@ -24,7 +24,7 @@ #define GET_ERROR 0x05 #define SET_VSM_TYPE 0x06 #define SIGNATURE 0x03 - #define VSA2_SIGNATURE 0x56534132 // 'VSA2' returned in EAX + #define VSA2_SIGNATURE 0x56534132 // 'VSA2' returned in EAX #define GET_HW_INFO 0x04 #define VSM_VERSION 0x05 @@ -32,7 +32,7 @@ #define MSR_ACCESS 0x07 #define GET_DESCR_INFO 0x08 #define PCI_INT_AB 0x09 // GPIO pins for INTA# and INTB# - #define PCI_INT_CD 0x0A // GPIO pins for INTC# and INTD# + #define PCI_INT_CD 0x0A // GPIO pins for INTC# and INTD# #define WATCHDOG 0x0B // Watchdog timer #define MAX_MISC WATCHDOG @@ -48,7 +48,7 @@ #define CODEC_TYPE 0x05 #define STATE_INDEX 0x06 #define STATE_DATA 0x07 - #define AUDIO_IRQ 0x08 // For use by native audio drivers + #define AUDIO_IRQ 0x08 // For use by native audio drivers #define STATUS_PTR 0x09 // For use by native audio drivers #define MAX_AUDIO STATUS_PTR @@ -86,7 +86,7 @@ #define VG_CFG_DPMS_V 0x0080 // VSYNC mask bit #define VG_VESA_SV_RST 0x0020 // VESA Save/Restore state flag #define VG_VESA_RST 0x0000 // VESA Restore state - #define VG_VESA_SV 0x0020 // VESA Save state + #define VG_VESA_SV 0x0020 // VESA Save state #define VG_FRSH_MODE 0x0002 // Mode refresh flag #define VG_FRSH_TIMINGS 0x0001 // Timings only refresh flag @@ -183,7 +183,7 @@ #define VG_TV_PAL 0x0010 // PAL output format #define VG_TV_HDTV 0x0020 // HDTV output format - // The meaning of the VG_TV_RES field is dependent on the selected + // The meaning of the VG_TV_RES field is dependent on the selected // encoder and output format. The translations are: // ADV7171 - Not Used // SAA7127 - Not Used @@ -191,7 +191,7 @@ // LO -> 720x480p // MED -> 1280x720p // HI -> 1920x1080i - // FS454 - Both SD and HD resolutions + // FS454 - Both SD and HD resolutions // SD Resolutions - NTSC and PAL // LO -> 640x480 // MED -> 800x600 @@ -331,8 +331,8 @@ #define RW_PIRQ 0x06 // read/write PCI IRQ router regs in SB Func0 cfg space #define SLPB_CLEAR 0x07 // clear sleep button GPIO status's #define PIRQ_ROUTING 0x08 // read the PCI IRQ routing based on BIOS setup - #define ACPI_UNUSED2 0x09 - #define ACPI_UNUSED3 0x0A + #define ACPI_UNUSED2 0x09 + #define ACPI_UNUSED3 0x0A #define PIC_INTERRUPT 0x0B #define ACPI_PRESENT 0x0C #define ACPI_GEN_COMMAND 0x0D @@ -380,7 +380,7 @@ #define VRC_DEBUGGER 0x0E #define MAX_DEBUGGER NO_VR - + #define VRC_STR 0x0F // Virtual Register class #define RESTORE_ADDR 0x00 // Physical address of MSR restore table @@ -404,7 +404,7 @@ #define VRC_SYSINFO 0x12 // Virtual Register class #define VRC_SI_VERSION 0x00 // Sysinfo VSM version - #define VRC_SI_CPU_MHZ 0x01 // CPU speed in MHZ + #define VRC_SI_CPU_MHZ 0x01 // CPU speed in MHZ #define VRC_SI_CHIPSET_BASE_LOW 0x02 #define VRC_SI_CHIPSET_BASE_HI 0x03 #define VRC_SI_CHIPSET_ID 0x04 diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index be27f1d9ea..f3ac2ed11f 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -1,6 +1,6 @@ /* * This file is part of the coreboot project. - * + * * Copyright (C) 2004 Eric W. Biederman * * This program is free software; you can redistribute it and/or modify diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index cbbd5cfd85..daa7e18422 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -17,7 +17,7 @@ static void wrmsr(unsigned long index, msr_t msr) #else -typedef struct msr_struct +typedef struct msr_struct { unsigned lo; unsigned hi; diff --git a/src/include/cpu/x86/pae.h b/src/include/cpu/x86/pae.h index c1eb022886..eb8fa5a91c 100644 --- a/src/include/cpu/x86/pae.h +++ b/src/include/cpu/x86/pae.h @@ -1,5 +1,5 @@ #ifndef CPU_X86_PAE_H -#define CPU_X86_PAE_H +#define CPU_X86_PAE_H #define MAPPING_ERROR ((void *)0xffffffffUL) void *map_2M_page(unsigned long page); diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 2954ecd1f7..155f666b3c 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* AMD64 SMM State-Save Area +/* AMD64 SMM State-Save Area * starts @ 0x7e00 */ typedef struct { @@ -115,7 +115,7 @@ typedef struct { } __attribute__((packed)) amd64_smm_state_save_area_t; -/* Intel Core 2 (EM64T) SMM State-Save Area +/* Intel Core 2 (EM64T) SMM State-Save Area * starts @ 0x7d00 */ typedef struct { @@ -193,7 +193,7 @@ typedef struct { } __attribute__((packed)) em64t_smm_state_save_area_t; -/* Legacy x86 SMM State-Save Area +/* Legacy x86 SMM State-Save Area * starts @ 0x7e00 */ diff --git a/src/include/cpu/x86/stack.h b/src/include/cpu/x86/stack.h index d39764a7d6..158b670251 100644 --- a/src/include/cpu/x86/stack.h +++ b/src/include/cpu/x86/stack.h @@ -1,6 +1,6 @@ /* * This file is part of the coreboot project. - * + * * Copyright (C) 2010 coresystems GmbH * * This program is free software; you can redistribute it and/or modify diff --git a/src/include/device/agp.h b/src/include/device/agp.h index 073858ae10..564b0bb4e6 100644 --- a/src/include/device/agp.h +++ b/src/include/device/agp.h @@ -2,7 +2,7 @@ #define DEVICE_AGP_H /* (c) 2005 Linux Networx GPL see COPYING for details */ -unsigned int agp_scan_bus(struct bus *bus, +unsigned int agp_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int agp_scan_bridge(device_t dev, unsigned int max); diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h index 07cc46a54a..5b003d3217 100644 --- a/src/include/device/cardbus.h +++ b/src/include/device/cardbus.h @@ -3,7 +3,7 @@ /* (c) 2005 Linux Networx GPL see COPYING for details */ void cardbus_read_resources(device_t dev); -unsigned int cardbus_scan_bus(struct bus *bus, +unsigned int cardbus_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int cardbus_scan_bridge(device_t dev, unsigned int max); void cardbus_enable_resources(device_t dev); diff --git a/src/include/device/device.h b/src/include/device/device.h index df8fb5f6d5..59dd0815e6 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -49,8 +49,8 @@ struct bus { unsigned disable_relaxed_ordering : 1; }; -#define MAX_RESOURCES 24 -#define MAX_LINKS 8 +#define MAX_RESOURCES 24 +#define MAX_LINKS 8 /* * There is one device structure for each slot-number/function-number * combination: @@ -78,7 +78,7 @@ struct device { unsigned int resources; /* links are (downstream) buses attached to the device, usually a leaf - * device with no children have 0 buses attached and a bridge has 1 bus + * device with no children have 0 buses attached and a bridge has 1 bus */ struct bus link[MAX_LINKS]; /* number of buses attached to the device */ @@ -139,10 +139,10 @@ void show_one_resource(int debug_level, struct device *dev, struct resource *resource, const char *comment); void show_all_devs_resources(int debug_level, const char* msg); -/* Rounding for boundaries. +/* Rounding for boundaries. * Due to some chip bugs, go ahead and round IO to 16 */ -#define DEVICE_IO_ALIGN 16 +#define DEVICE_IO_ALIGN 16 #define DEVICE_MEM_ALIGN 4096 extern struct device_operations default_dev_ops_root; diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index 6a350f8232..e927d617fd 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -3,7 +3,7 @@ #include <device/hypertransport_def.h> -unsigned int hypertransport_scan_chain(struct bus *bus, +unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unit_base, unsigned offset_unitid); unsigned int ht_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_ht_ops_bus; diff --git a/src/include/device/hypertransport_def.h b/src/include/device/hypertransport_def.h index 6c12dcf39f..d6276ba003 100644 --- a/src/include/device/hypertransport_def.h +++ b/src/include/device/hypertransport_def.h @@ -11,7 +11,7 @@ #define HT_FREQ_1200Mhz 7 #define HT_FREQ_1400Mhz 8 #define HT_FREQ_1600Mhz 9 -#define HT_FREQ_1800Mhz 10 +#define HT_FREQ_1800Mhz 10 #define HT_FREQ_2000Mhz 11 #define HT_FREQ_2200Mhz 12 #define HT_FREQ_2400Mhz 13 diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 5485644393..131564c8c5 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -61,7 +61,7 @@ void pci_bus_enable_resources(device_t dev); void pci_bus_reset(struct bus *bus); device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, - unsigned int (*do_scan_bus)(struct bus *bus, + unsigned int (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max)); unsigned int pci_scan_bridge(device_t bus, unsigned int max); unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index ba972547ea..a5aa3a1c3b 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -26,7 +26,7 @@ #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ #define PCI_STATUS_PARITY 0x100 /* Detected parity error */ #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ -#define PCI_STATUS_DEVSEL_FAST 0x000 +#define PCI_STATUS_DEVSEL_FAST 0x000 #define PCI_STATUS_DEVSEL_MEDIUM 0x200 #define PCI_STATUS_DEVSEL_SLOW 0x400 #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ @@ -55,8 +55,8 @@ /* * Base addresses specify locations in memory or I/O space. - * Decoded size can be determined by writing a value of - * 0xffffffff to the register, and reading it back. Only + * Decoded size can be determined by writing a value of + * 0xffffffff to the register, and reading it back. Only * 1 bits are decoded. */ #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ @@ -80,7 +80,7 @@ /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c -#define PCI_SUBSYSTEM_ID 0x2e +#define PCI_SUBSYSTEM_ID 0x2e #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL) @@ -189,7 +189,7 @@ /* Hypertransport Registers */ #define PCI_HT_CAP_SIZEOF 4 -#define PCI_HT_CAP_HOST_CTRL 4 /* Host link control */ +#define PCI_HT_CAP_HOST_CTRL 4 /* Host link control */ #define PCI_HT_CAP_HOST_WIDTH 6 /* width value & capability */ #define PCI_HT_CAP_HOST_FREQ 0x09 /* Host frequency */ #define PCI_HT_CAP_HOST_FREQ_CAP 0x0a /* Host Frequency capability */ diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 9ea662d490..becc800934 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -2,7 +2,7 @@ #define DEVICE_PCIEXP_H /* (c) 2005 Linux Networx GPL see COPYING for details */ -unsigned int pciexp_scan_bus(struct bus *bus, +unsigned int pciexp_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 8bf193530a..e017922ef1 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,7 +2,7 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */ -unsigned int pcix_scan_bus(struct bus *bus, +unsigned int pcix_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int pcix_scan_bridge(device_t dev, unsigned int max); const char *pcix_speed(unsigned sstatus); diff --git a/src/include/smp/atomic.h b/src/include/smp/atomic.h index 09a77e72f1..8da08a2250 100644 --- a/src/include/smp/atomic.h +++ b/src/include/smp/atomic.h @@ -11,40 +11,40 @@ typedef struct { int counter; } atomic_t; /** * atomic_read - read atomic variable * @v: pointer of type atomic_t - * + * * Atomically reads the value of @v. Note that the guaranteed * useful range of an atomic_t is only 24 bits. - */ + */ #define atomic_read(v) ((v)->counter) /** * atomic_set - set atomic variable * @v: pointer of type atomic_t * @i: required value - * + * * Atomically sets the value of @v to @i. Note that the guaranteed * useful range of an atomic_t is only 24 bits. - */ + */ #define atomic_set(v,i) (((v)->counter) = (i)) /** * atomic_inc - increment atomic variable * @v: pointer of type atomic_t - * + * * Atomically increments @v by 1. Note that the guaranteed * useful range of an atomic_t is only 24 bits. - */ + */ #define atomic_inc(v) (((v)->counter)++) /** * atomic_dec - decrement atomic variable * @v: pointer of type atomic_t - * + * * Atomically decrements @v by 1. Note that the guaranteed * useful range of an atomic_t is only 24 bits. - */ + */ #define atomic_dec(v) (((v)->counter)--) diff --git a/src/include/string.h b/src/include/string.h index b4edf432ac..04c3733f8b 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -12,10 +12,10 @@ int memcmp(const void *s1, const void *s2, size_t n); int sprintf(char * buf, const char *fmt, ...); #endif -// simple string functions +// simple string functions -static inline size_t strnlen(const char *src, size_t max) -{ +static inline size_t strnlen(const char *src, size_t max) +{ size_t i = 0; while((*src++) && (i < max)) { i++; @@ -37,13 +37,13 @@ static inline char *strchr(const char *s, int c) for (; *s; s++) { if (*s == c) return (char *) s; - } + } return 0; } #if !defined(__PRE_RAM__) static inline char *strdup(const char *s) -{ +{ size_t sz = strlen(s) + 1; char *d = malloc(sz); memcpy(d, s, sz); @@ -69,7 +69,7 @@ static inline char *strncpy(char *to, const char *from, int count) } static inline int strcmp(const char *s1, const char *s2) -{ +{ int r; while ((r = (*s1 - *s2)) == 0 && *s1) { @@ -77,7 +77,7 @@ static inline int strcmp(const char *s1, const char *s2) s2++; } return r; -} +} static inline int strncmp(const char *s1, const char *s2, int maxlen) { |