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-rw-r--r--src/include/device/pci.h1
-rw-r--r--src/include/device/pci_def.h6
-rw-r--r--src/include/device/pciexp.h1
3 files changed, 8 insertions, 0 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 0670da4822..4e712f9f7b 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -33,6 +33,7 @@
struct pci_operations {
/* set the Subsystem IDs for the PCI device */
void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device);
+ void (*set_L1_ss_latency)(device_t dev, unsigned int off);
};
/* Common pci bus operations */
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 403978584d..c49e4ebf36 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -405,6 +405,12 @@
#define PCI_EXT_CAP_ID_DSN 3
#define PCI_EXT_CAP_ID_PWR 4
+/* Extended Capability lists*/
+#define PCIE_EXT_CAP_OFFSET 0x100
+#define PCIE_EXT_CAP_AER_ID 0x0001
+#define PCIE_EXT_CAP_L1SS_ID 0x001E
+#define PCIE_EXT_CAP_LTR_ID 0x0018
+
/* Advanced Error Reporting */
#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
#define PCI_ERR_UNC_TRAIN 0x00000001 /* Training */
diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index 87a5002c5e..1146557858 100644
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -15,4 +15,5 @@ unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
extern struct device_operations default_pciexp_ops_bus;
+unsigned int pciexp_find_extended_cap(device_t dev, unsigned int cap);
#endif /* DEVICE_PCIEXP_H */