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-rw-r--r--src/lib/edid.c2
-rw-r--r--src/lib/hardwaremain.c2
-rw-r--r--src/lib/libgcc.c9
-rw-r--r--src/lib/prog_loaders.c5
-rw-r--r--src/lib/ramtest.c2
-rw-r--r--src/lib/reg_script.c6
-rw-r--r--src/lib/timestamp.c2
7 files changed, 16 insertions, 12 deletions
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 78adf490fd..f20d23959e 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -501,7 +501,7 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension,
* another call to edid_set_framebuffer_bits_per_pixel(). As a cheap
* heuristic, assume that X86 systems require a 64-byte row alignment
* (since that seems to be true for most Intel chipsets). */
- if (CONFIG(ARCH_X86))
+ if (ENV_X86)
edid_set_framebuffer_bits_per_pixel(out, 32, 64);
else
edid_set_framebuffer_bits_per_pixel(out, 32, 0);
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 935393e10b..59da967e66 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -425,7 +425,7 @@ void main(void)
/* TODO: Understand why this is here and move to arch/platform code. */
/* For MMIO UART this needs to be called before any other printk. */
- if (CONFIG(ARCH_X86))
+ if (ENV_X86)
init_timer();
/* console_init() MUST PRECEDE ALL printk()! Additionally, ensure
diff --git a/src/lib/libgcc.c b/src/lib/libgcc.c
index 656e20f1a6..df2325a05a 100644
--- a/src/lib/libgcc.c
+++ b/src/lib/libgcc.c
@@ -7,8 +7,13 @@
* <lib.h> in case GCC does not have an assembly version for this arch.
*/
-#if !CONFIG(ARCH_X86) /* work around lack of --gc-sections on x86 */ \
- && !CONFIG(ARCH_RISCV_RV32) /* defined in rv32 libgcc.a */
+/*
+ * FIXME
+ * work around lack of --gc-sections on x86
+ * defined in rv32 libgcc.a
+ */
+
+#if !ENV_X86 && !ENV_RISCV
int __clzsi2(u32 a);
int __clzsi2(u32 a)
{
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 7088d8d45e..69e81cda72 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -46,7 +46,7 @@ void run_romstage(void)
vboot_run_logic();
- if (CONFIG(ARCH_X86) && CONFIG(BOOTBLOCK_NORMAL)) {
+ if (ENV_X86 && CONFIG(BOOTBLOCK_NORMAL)) {
if (legacy_romstage_selector(&romstage))
goto fail;
} else {
@@ -119,8 +119,7 @@ void run_ramstage(void)
* Only x86 systems using ramstage stage cache currently take the same
* firmware path on resume.
*/
- if (CONFIG(ARCH_X86) &&
- !CONFIG(NO_STAGE_CACHE))
+ if (ENV_X86 && !CONFIG(NO_STAGE_CACHE))
run_ramstage_from_resume(&ramstage);
vboot_run_logic();
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 489ca28d59..c6cd7a4a1d 100644
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -3,7 +3,7 @@
#include <console/console.h>
#include <device/mmio.h>
-#if CONFIG(ARCH_X86) && CONFIG(SSE2)
+#if ENV_X86 && CONFIG(SSE2)
/* Assembler in lib/ is ugly. */
static void write_phys(uintptr_t addr, u32 value)
{
diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index 73b781a43b..51ef689ac9 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -11,7 +11,7 @@
#include <stdint.h>
#include <reg_script.h>
-#if CONFIG(ARCH_X86)
+#if ENV_X86
#include <cpu/x86/msr.h>
#endif
@@ -363,7 +363,7 @@ static void reg_script_write_iosf(struct reg_script_context *ctx)
static uint64_t reg_script_read_msr(struct reg_script_context *ctx)
{
-#if CONFIG(ARCH_X86)
+#if ENV_X86
const struct reg_script *step = reg_script_get_step(ctx);
msr_t msr = rdmsr(step->reg);
uint64_t value = msr.hi;
@@ -375,7 +375,7 @@ static uint64_t reg_script_read_msr(struct reg_script_context *ctx)
static void reg_script_write_msr(struct reg_script_context *ctx)
{
-#if CONFIG(ARCH_X86)
+#if ENV_X86
const struct reg_script *step = reg_script_get_step(ctx);
msr_t msr;
msr.hi = step->value >> 32;
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c
index d10b138d06..24d80ea89a 100644
--- a/src/lib/timestamp.c
+++ b/src/lib/timestamp.c
@@ -71,7 +71,7 @@ static int timestamp_should_run(void)
* Only check boot_cpu() in other stages than
* ENV_PAYLOAD_LOADER on x86.
*/
- if ((!ENV_PAYLOAD_LOADER && CONFIG(ARCH_X86)) && !boot_cpu())
+ if ((!ENV_PAYLOAD_LOADER && ENV_X86) && !boot_cpu())
return 0;
return 1;