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Diffstat (limited to 'src/mainboard/advansus/a785e-i')
-rw-r--r--src/mainboard/advansus/a785e-i/mptable.c58
1 files changed, 0 insertions, 58 deletions
diff --git a/src/mainboard/advansus/a785e-i/mptable.c b/src/mainboard/advansus/a785e-i/mptable.c
index f60b6b00b1..b04cf412dc 100644
--- a/src/mainboard/advansus/a785e-i/mptable.c
+++ b/src/mainboard/advansus/a785e-i/mptable.c
@@ -75,64 +75,6 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
- /* PCI interrupts are level triggered, and are
- * associated with a specific bus/device/function tuple.
- */
-#if !CONFIG_GENERATE_ACPI_TABLES
-#define PCI_INT(bus, dev, fn, pin) \
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin))
-#else
-#define PCI_INT(bus, dev, fn, pin)
-#endif
-
- PCI_INT(0x0, 0x14, 0x0, 0x10);
- /* HD Audio: */
- PCI_INT(0x0, 0x14, 0x2, 0x12);
-
- PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */
- PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]);
- PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]);
- PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]);
- PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]);
- PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]);
-
- /* sata */
- PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
-
- /* on board NIC & Slot PCIE. */
- /* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
-/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
- PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
- /* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
- PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
- /* configuration B doesnt need dev 5,6,7 */
- /*
- * PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
- * PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
- * PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
- */
- PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
- PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
-
- /* PCI slots */
- /* PCI_SLOT 0. */
- PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14);
- PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15);
- PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16);
- PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17);
-
- /* PCI_SLOT 1. */
- PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15);
- PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16);
- PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17);
- PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14);
-
- /* PCI_SLOT 2. */
- PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16);
- PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17);
- PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14);
- PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15);
-
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);