summaryrefslogtreecommitdiff
path: root/src/mainboard/amd/bettong/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/amd/bettong/romstage.c')
-rw-r--r--src/mainboard/amd/bettong/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 03e6585b9a..c9a257cec5 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -18,10 +18,13 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
-#include <cpu/x86/bist.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/pi/hudson/hudson.h>
+/* Mask BIST bit 31. One result of Silicon Observation
+ * report_bist_failure(bist & 0x7FFFFFFF);
+ */
+
static void romstage_main_template(void)
{
u32 val;
@@ -38,9 +41,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist & 0x7FFFFFFF); /* Mask bit 31. One result of Silicon Observation */
/* Load MPB */
val = cpuid_eax(1);