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-rw-r--r--src/mainboard/amd/bettong/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 32f52de707..03e6585b9a 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -19,11 +19,10 @@
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/bist.h>
-#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/pi/hudson/hudson.h>
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
+static void romstage_main_template(void)
{
u32 val;