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Diffstat (limited to 'src/mainboard/amd/bimini_fam10')
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index 7afec9a9fb..1367f9f61d 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -64,11 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
-#include "cpu/amd/microcode/microcode.c"
-
-#if CONFIG_UPDATE_CPU_MICROCODE
-#include "cpu/amd/model_10xxx/update_microcode.c"
-#endif
+#include "cpu/amd/microcode.h"
#include "cpu/amd/model_10xxx/init_cpus.c"
#include "northbridge/amd/amdfam10/early_ht.c"
@@ -124,9 +120,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
-#if CONFIG_UPDATE_CPU_MICROCODE
update_microcode(val);
-#endif
+
post_code(0x33);
cpuSetAMDMSR();