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-rw-r--r--src/mainboard/amd/db-ft3b-lc/devicetree.cb61
1 files changed, 0 insertions, 61 deletions
diff --git a/src/mainboard/amd/db-ft3b-lc/devicetree.cb b/src/mainboard/amd/db-ft3b-lc/devicetree.cb
deleted file mode 100644
index dfbe3e27d7..0000000000
--- a/src/mainboard/amd/db-ft3b-lc/devicetree.cb
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2013 Advanced Micro Devices, Inc.
-# Copyright (C) 2015 Kyösti Mälkki <kyosti.malkki@gmail.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-chip northbridge/amd/pi/00730F01/root_complex
- device cpu_cluster 0 on
- chip cpu/amd/pi/00730F01
- device lapic 0 on end
- end
- end
-
- device domain 0 on
- subsystemid 0x1022 0x1410 inherit
-
- chip northbridge/amd/pi/00730F01
- device pci 0.0 on end # Root Complex
- device pci 0.2 off end # IOMMU
- device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
- device pci 1.1 on end # Internal Multimedia
- device pci 2.0 on end # PCIe Host Bridge
- device pci 2.1 on end # x4 PCIe slot
- device pci 2.2 on end # mPCIe slot
- device pci 2.3 on end # Realtek NIC
- device pci 2.4 off end # Edge Connector
- device pci 2.5 off end # Edge Connector
- device pci 8.0 off end # Platform Security Processor
- end #chip northbridge/amd/pi/00730F01
-
- chip southbridge/amd/pi/hudson
- device pci 10.0 on end # XHCI HC0
- device pci 11.0 on end # SATA
- device pci 12.0 on end # EHCI #0
- device pci 13.0 on end # EHCI #1
- device pci 14.0 on end # SMBus
- device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on end # LPC 0x439d
- device pci 14.7 on end # SD
- device pci 16.0 on end # EHCI #2
- register "sd_mode" = "3"
- end #chip southbridge/amd/pi/hudson
-
- device pci 18.0 on end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- device pci 18.4 on end
- device pci 18.5 on end
-
- end #domain
-end #northbridge/amd/pi/00730F01/root_complex