summaryrefslogtreecommitdiff
path: root/src/mainboard/amd/db800
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/amd/db800')
-rw-r--r--src/mainboard/amd/db800/Kconfig2
-rw-r--r--src/mainboard/amd/db800/devicetree.cb2
-rw-r--r--src/mainboard/amd/db800/romstage.c6
3 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig
index 834e08589c..ee2aa0f44c 100644
--- a/src/mainboard/amd/db800/Kconfig
+++ b/src/mainboard/amd/db800/Kconfig
@@ -3,7 +3,7 @@ if BOARD_AMD_DB800
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
- select CPU_AMD_LX
+ select CPU_AMD_GEODE_LX
select NORTHBRIDGE_AMD_LX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb
index e872571194..e0f20dc9b7 100644
--- a/src/mainboard/amd/db800/devicetree.cb
+++ b/src/mainboard/amd/db800/devicetree.cb
@@ -60,7 +60,7 @@ chip northbridge/amd/lx
end
# APIC cluster is late CPU init.
device lapic_cluster 0 on
- chip cpu/amd/model_lx
+ chip cpu/amd/geode_lx
device lapic 0 on end
end
end
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index 264f1a809e..3590c37bfe 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -49,9 +49,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
void main(unsigned long bist)
{