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-rw-r--r--src/mainboard/amd/inagua/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index 151ce31e87..3e37e03f35 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -40,10 +40,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- /* all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
- */
- __writemsr (0xc0010062, 0);
-
amd_initmmio();
if (!cpu_init_detectedx && boot_cpu()) {