diff options
Diffstat (limited to 'src/mainboard/amd/quartet/auto.c')
| -rw-r--r-- | src/mainboard/amd/quartet/auto.c | 49 |
1 files changed, 30 insertions, 19 deletions
diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c index 67bc959496..6a3b2194e7 100644 --- a/src/mainboard/amd/quartet/auto.c +++ b/src/mainboard/amd/quartet/auto.c @@ -7,7 +7,8 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <arch/smp/lapic.h> +#include <cpu/x86/lapic.h> +#include <arch/cpu.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -16,13 +17,15 @@ #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" -#include "cpu/k8/apic_timer.c" +#include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/cpu_rev.c" #include "superio/NSC/pc87360/pc87360_early_serial.c" +#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/bist.h" #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) @@ -41,7 +44,10 @@ static void soft_reset(void) pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1); } - +/* + * GPIO28 of 8111 will control H0_MEMRESET_L + * GPIO29 of 8111 will control H1_MEMRESET_L + */ static void memreset_setup(void) { if (is_cpu_pre_c0()) { @@ -144,13 +150,10 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "fakespd.c" #endif -#include "northbridge/amd/amdk8/setup_resource_map.c" +// #include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" - #include "northbridge/amd/amdk8/coherent_ht.c" - #include "sdram/generic_sdram.c" - #include "resourcemap.c" /* quartet does not want the default */ #define RC0 ((1<<1)<<8) @@ -163,7 +166,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #define DIMM2 0x52 #define DIMM3 0x53 -static void main(void) +static void main(unsigned long bist) { static const struct mem_controller cpu[] = { { @@ -215,22 +218,30 @@ static void main(void) int needs_reset; - enable_lapic(); - init_timer(); + if (bist == 0) { + /* Skip this if there was a built in self test failure */ + amd_early_mtrr_init(); + enable_lapic(); + init_timer(); + /* Has this cpu already booted? */ + if (cpu_init_detected()) { + asm volatile ("jmp __cpu_reset"); + } - if (cpu_init_detected()) { - asm("jmp __cpu_reset"); - } - - distinguish_cpu_resets(); + distinguish_cpu_resets(); - if (!boot_cpu()) { - stop_this_cpu(); + if (!boot_cpu()) { + stop_this_cpu(); + } } - + /* Setup the console */ pc87360_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); + setup_quartet_resource_map(); needs_reset = setup_coherent_ht_domain(); // needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80); |