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Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/romstage.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index 1c5debed04..d00779d0a4 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -114,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
dump_pci_device(PCI_DEV(0, 0x19, 0));
#endif
- print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
+ printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid);
set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
setup_coherent_ht_domain(); // routing table and start other core0
@@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Read FIDVID_STATUS */
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+ printk(BIOS_DEBUG, "begin msr fid, vid %08x%08x\n", msr.hi, msr.lo);
}
enable_fid_change();
@@ -160,11 +160,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+ printk(BIOS_DEBUG, "end msr fid, vid %08x%08x\n", msr.hi, msr.lo);
}
} else {
- print_debug("Changing FIDVID not supported\n");
+ printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
}
#endif
@@ -174,7 +174,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// fidvid change will issue one LDTSTOP and the HT change will be effective too
if (needs_reset) {
- print_info("ht reset -\n");
+ printk(BIOS_INFO, "ht reset -\n");
soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn);
}
#endif