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-rw-r--r--src/mainboard/amd/db800/romstage.c6
-rw-r--r--src/mainboard/amd/norwich/romstage.c6
2 files changed, 2 insertions, 10 deletions
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index 3590c37bfe..2bb6cd379a 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -41,10 +41,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
-#define ManualConf 0 /* Do automatic strapped PLL config */
-#define PLLMSRhi 0x000005DD /* Manual settings for the PLL */
-#define PLLMSRlo 0x00DE60EE
-
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
@@ -74,7 +70,7 @@ void main(unsigned long bist)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- pll_reset(ManualConf);
+ pll_reset();
cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index d8fca5a51f..c71b31f2d3 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -38,10 +38,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
-#define ManualConf 0 /* Do automatic strapped PLL config */
-#define PLLMSRhi 0x00001490 /* manual settings for the PLL */
-#define PLLMSRlo 0x02000030
-
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
@@ -75,7 +71,7 @@ void main(unsigned long bist)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- pll_reset(ManualConf);
+ pll_reset();
cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);