diff options
Diffstat (limited to 'src/mainboard/amd')
21 files changed, 86 insertions, 86 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index ef85df2bed..73c41e3dda 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -34,13 +34,13 @@ #include <cpu/x86/lapic.h> #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <lib.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/amd/rs780/early_setup.c" @@ -57,12 +57,12 @@ static int spd_read_byte(u32 device, u32 address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/amdfam10.h> #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/microcode.h" +#include <cpu/amd/microcode.h> #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 63e9275141..e7532cf540 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -24,16 +24,16 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <console/console.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" +#include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> -#include "northbridge/amd/lx/raminit.h" +#include <northbridge/amd/lx/raminit.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index c9a04f5eef..5b9b6ca0ad 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -26,14 +26,14 @@ #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdk8/reset_test.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include <spd.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/rs690/early_setup.c" #include "southbridge/amd/sb600/early_setup.c" @@ -49,7 +49,7 @@ static inline int spd_read_byte(u32 device, u32 address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8.h" +#include <northbridge/amd/amdk8/amdk8.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c index ad6bce358d..64efdd642d 100644 --- a/src/mainboard/amd/dinar/romstage.c +++ b/src/mainboard/amd/dinar/romstage.c @@ -30,10 +30,10 @@ #include <console/loglevel.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/smsc/sch4037/sch4037.h> #include <superio/smsc/sio1036/sio1036.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "nb_cimx.h" #include <sb_cimx.h> diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c index 1a80e5ce13..1f63979263 100644 --- a/src/mainboard/amd/inagua/romstage.c +++ b/src/mainboard/amd/inagua/romstage.c @@ -32,9 +32,9 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/smsc/kbc1100/kbc1100.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 00223aed74..6e3de074fc 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -27,17 +27,17 @@ #include <console/console.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdk8/reset_test.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8718f/it8718f.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/rs780/early_setup.c" -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> #include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */ #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) @@ -50,7 +50,7 @@ static inline int spd_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -#include "northbridge/amd/amdk8/amdk8.h" +#include <northbridge/amd/amdk8/amdk8.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index b940be0964..0a6a3308f7 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -34,20 +34,20 @@ #include <cpu/x86/lapic.h> #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <lib.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8718f/it8718f.h> #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/amd/rs780/early_setup.c" -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> #include "northbridge/amd/amdfam10/debug.c" #include <spd.h> @@ -60,12 +60,12 @@ static int spd_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/amdfam10.h> #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/microcode.h" +#include <cpu/amd/microcode.h> #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 2c8293742f..9daa1d6776 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -24,14 +24,14 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <console/console.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" +#include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "northbridge/amd/lx/raminit.h" +#include <northbridge/amd/lx/raminit.h> int spd_read_byte(unsigned int device, unsigned int address) { diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 82dcd602de..226278236f 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -31,10 +31,10 @@ #include <console/loglevel.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" -#include "southbridge/amd/agesa/hudson/hudson.h" -#include "cpu/amd/agesa/s3_resume.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/lapic.h> +#include <southbridge/amd/agesa/hudson/hudson.h> +#include <cpu/amd/agesa/s3_resume.h> #include "cbmem.h" diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index f603d738c5..6fa3af6bb9 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -32,10 +32,10 @@ #include <cpu/amd/car.h> #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" -#include "southbridge/amd/pi/avalon/hudson.h" -#include "cpu/amd/pi/s3_resume.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/lapic.h> +#include <southbridge/amd/pi/avalon/hudson.h> +#include <cpu/amd/pi/s3_resume.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index e38d715c8b..1fb709a372 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -31,10 +31,10 @@ #include <console/loglevel.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" -#include "southbridge/amd/agesa/hudson/hudson.h" -#include "cpu/amd/agesa/s3_resume.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/lapic.h> +#include <southbridge/amd/agesa/hudson/hudson.h> +#include <cpu/amd/agesa/s3_resume.h> #include "cbmem.h" diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index 581c2c2858..2fdab4153c 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -32,16 +32,16 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/fintek/common/fintek.h> #include <superio/fintek/f81865f/f81865f.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" #include "cbmem.h" -#include "cpu/amd/mtrr.h" -#include "cpu/amd/agesa/s3_resume.h" +#include <cpu/amd/mtrr.h> +#include <cpu/amd/agesa/s3_resume.h> #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1) diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index af4253d705..906ff850cf 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -26,12 +26,12 @@ #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdk8/reset_test.c" #include <spd.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/rs690/early_setup.c" #include "southbridge/amd/sb600/early_setup.c" @@ -45,7 +45,7 @@ static inline int spd_read_byte(u32 device, u32 address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8.h" +#include <northbridge/amd/amdk8/amdk8.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 248baa0d3a..fb21b2f3c6 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -5,8 +5,8 @@ #include <console/console.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/msr.h> #include <cpu/amd/gx2def.h> #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -22,7 +22,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/gx2/raminit.h" +#include <northbridge/amd/gx2/raminit.h> #include "northbridge/amd/gx2/pll_reset.c" #include "northbridge/amd/gx2/raminit.c" #include "lib/generic_sdram.c" diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index ec0682a667..f49aa61dd1 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -9,9 +9,9 @@ #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/early_smbus.c" #include <reset.h> -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "northbridge/amd/amdk8/reset_test.c" -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" #include <cpu/amd/mtrr.h> @@ -50,7 +50,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8.h" +#include <northbridge/amd/amdk8/amdk8.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index df968c3e96..749b48ede6 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -35,14 +35,14 @@ #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <lib.h> #include <spd.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdfam10/debug.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> @@ -79,12 +79,12 @@ static int spd_read_byte(u32 device, u32 address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/amdfam10.h> #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/microcode.h" +#include <cpu/amd/microcode.h> #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c index ccf84b61cf..5f902c312e 100644 --- a/src/mainboard/amd/south_station/romstage.c +++ b/src/mainboard/amd/south_station/romstage.c @@ -32,10 +32,10 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/fintek/common/fintek.h> #include <superio/fintek/f81865f/f81865f.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 319cd3a8bd..30808a4dfd 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -31,11 +31,11 @@ #include <console/loglevel.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/lapic.h> +#include <southbridge/amd/agesa/hudson/hudson.h> #include "src/superio/smsc/lpc47n217/early_serial.c" -#include "cpu/amd/agesa/s3_resume.h" +#include <cpu/amd/agesa/s3_resume.h> #include "cbmem.h" #define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index c4ccc70096..0b6b7db594 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -34,20 +34,20 @@ #include <cpu/x86/lapic.h> #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <lib.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8718f/it8718f.h> #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/amd/rs780/early_setup.c" -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> #include "northbridge/amd/amdfam10/debug.c" #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) @@ -59,12 +59,12 @@ static int spd_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/amdfam10.h> #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/microcode.h" +#include <cpu/amd/microcode.h> #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index e3f41a070b..6c2f2c5b16 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -29,9 +29,9 @@ #include <console/loglevel.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include <superio/smsc/kbc1100/kbc1100.h> -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "sb_cimx.h" #include "SbPlatform.h" #include <arch/cpu.h> diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c index c75cf7a270..714eb3c1fe 100644 --- a/src/mainboard/amd/union_station/romstage.c +++ b/src/mainboard/amd/union_station/romstage.c @@ -32,8 +32,8 @@ #include <cpu/x86/mtrr.h> #include <cpu/amd/car.h> #include <northbridge/amd/agesa/agesawrapper.h> -#include "cpu/x86/bist.h" -#include "cpu/x86/lapic.h" +#include <cpu/x86/bist.h> +#include <cpu/x86/lapic.h> #include <sb_cimx.h> #include "SBPLATFORM.h" |