3 files changed, 6 insertions, 21 deletions
diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c
index b6347ebc37..3fa2405739 100644
--- a/src/mainboard/amd/bimini_fam10/mainboard.c
+++ b/src/mainboard/amd/bimini_fam10/mainboard.c
@@ -24,9 +24,6 @@
 #include <southbridge/amd/sb800/sb800.h>
 #include "southbridge/amd/rs780/rs780.h"
 
-void set_pcie_dereset(void);
-void set_pcie_reset(void);
-
 /* GPIO6. */
 static void enable_int_gfx(void)
 {
@@ -58,16 +55,9 @@ static void enable_int_gfx(void)
 /*
  * Bimini uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
  * pull it up before training the slot.
+ *
+ * Old comment says: GPIO 50h to reset PCIe slot.
  ***/
-void set_pcie_dereset(void)
-{
-	/* GPIO 50h reset PCIe slot */
-}
-
-void set_pcie_reset(void)
-{
-	/* GPIO 50h reset PCIe slot */
-}
 
 int is_dev3_present(void)
 {
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 53a8290685..a4a26e026c 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -24,13 +24,11 @@
 #include "southbridge/amd/sb700/smbus.h"
 #include "southbridge/amd/rs780/rs780.h"
 
-void set_pcie_dereset(void);
-void set_pcie_reset(void);
 /*
  * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
  * pull it up before training the slot.
  ***/
-void set_pcie_dereset()
+void set_pcie_dereset(void)
 {
 	u16 word;
 	struct device *sm_dev;
@@ -43,7 +41,7 @@ void set_pcie_dereset()
 	pci_write_config16(sm_dev, 0xA8, word);
 }
 
-void set_pcie_reset()
+void set_pcie_reset(void)
 {
 	u16 word;
 	struct device *sm_dev;
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index e8a08a53c1..44c1df69ba 100644
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -34,10 +34,7 @@
 #define ADT7461_write_byte(address, val) \
 	do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
 
-void set_pcie_dereset(void);
-void set_pcie_reset(void);
-
-void set_pcie_dereset()
+void set_pcie_dereset(void)
 {
 	u8 byte;
 	u16 word;
@@ -62,7 +59,7 @@ void set_pcie_dereset()
 	pci_write_config16(sm_dev, 0x7e, word);
 }
 
-void set_pcie_reset()
+void set_pcie_reset(void)
 {
 	u8 byte;
 	u16 word;