diff options
Diffstat (limited to 'src/mainboard/aopen/dxplplusu/romstage.c')
-rw-r--r-- | src/mainboard/aopen/dxplplusu/romstage.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c index f95c7f91e2..57538d6f80 100644 --- a/src/mainboard/aopen/dxplplusu/romstage.c +++ b/src/mainboard/aopen/dxplplusu/romstage.c @@ -14,22 +14,14 @@ */ #include <stdint.h> -#include <device/pci_def.h> #include <arch/io.h> -#include <stdlib.h> #include <cbmem.h> #include <console/console.h> -#include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> #include <southbridge/intel/i82801dx/i82801dx.h> #include <northbridge/intel/e7505/raminit.h> -#include <device/pnp_def.h> -#include <superio/smsc/lpc47m10x/lpc47m10x.h> - -#define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1) - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); @@ -46,13 +38,6 @@ void mainboard_romstage_entry(unsigned long bist) }, }; - /* Get the serial port running and print a welcome banner */ - lpc47m10x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - /* If this is a warm boot, some initialization can be skipped */ if (!e7505_mch_is_ready()) { enable_smbus(); |