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Diffstat (limited to 'src/mainboard/artecgroup/dbe61/Config.lb')
| -rw-r--r-- | src/mainboard/artecgroup/dbe61/Config.lb | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/artecgroup/dbe61/Config.lb b/src/mainboard/artecgroup/dbe61/Config.lb index 6184d83a25..a39cbdfe8c 100644 --- a/src/mainboard/artecgroup/dbe61/Config.lb +++ b/src/mainboard/artecgroup/dbe61/Config.lb @@ -47,8 +47,6 @@ driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o - -if USE_DCACHE_RAM #compile cache_as_ram.c to auto.inc makerule ./cache_as_ram_auto.inc depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" @@ -56,8 +54,6 @@ if USE_DCACHE_RAM action "perl -e 's/\.rodata/.rom.data/g' -pi $@" action "perl -e 's/\.text/.section .rom.text/g' -pi $@" end -end - ## ## Build our 16 bit and 32 bit coreboot entry code @@ -106,10 +102,8 @@ end ## mainboardinit cpu/x86/fpu/enable_fpu.inc -if USE_DCACHE_RAM mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc -end ## ## Include the secondary Configuration files |