1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/asrock/h110m/bootblock.c b/src/mainboard/asrock/h110m/bootblock.c
new file mode 100644
index 0000000000..96ce2053a7
--- /dev/null
+++ b/src/mainboard/asrock/h110m/bootblock.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ * Copyright (C) 2019 Maxim Polyakov <max.senia.poliak@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+#include <superio/nuvoton/common/nuvoton.h>
+#include <superio/nuvoton/nct6791d/nct6791d.h>
+#include "include/gpio.h"
+
+static void early_config_superio(void)
+{
+	const pnp_devfn_t serial_dev = PNP_DEV(0x2e, NCT6791D_SP1);
+	nuvoton_enable_serial(serial_dev, CONFIG_TTYS0_BASE);
+}
+
+static void early_config_gpio(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't do. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
+
+void bootblock_mainboard_init(void)
+{
+	early_config_gpio();
+}
+
+void bootblock_mainboard_early_init(void)
+{
+	early_config_superio();
+}